1. PIN DESCRIPTIONS
Pin Name
Pin #
SDA
1
Serial Control Data (Input/Output) - Bi-directional data I/O for the I²C control port.
SDINx
2,3
Serial Data Input (Input) - Input channels serial audio data.
Frame Synchronization Clock/Left/Right Clock (Input/Output) - Determines which channel or
FS/LRCK
4
frame is currently active on the serial audio data line.
MCLK
5
Master Clock (Input) -Clock source for the internal logic, processing, and modulators.
SCLK
6
Serial Clock (Input/Output) -Serial Clock for the serial data port.
Serial Data Output 1 (Output) - ADC data output into a multi-slot TDM stream or AIN1 and AIN2
SDOUT1
7
ADC data output in Left Justified and I²S modes.
VL
8
Interface Power (Input) - Positive power for the digital interface level shifters.
GND
9,21
Ground (Input) - Ground reference for the I/O and digital, analog sections.
VDREG
10
Digital Power (Output) - Internally generated positive power supply for digital section.
Positive Analog Input (Input) - Positive input signals to the internal analog to digital converters.
11,13,15,
AINx+
The full scale analog input level is specified in the Analog Input Characteristics tables on pages
17
and 12.
Negative Analog Input (Input) - Negative input signals to the internal analog to digital converters.
12,14,16,
AINx-
The full scale analog input level is specified in the Analog Input Characteristics tables on pages
18
and 12.
FILT+
19
Positive Voltage Reference (Output) - Positive reference voltage for the internal ADCs.
DS900PP2
SDA
1
SDIN1
2
SDIN2
3
FS/LRCK
4
MCLK
5
(Though Package)
SCLK
6
SDOUT1
7
VL
8
GND
9
VDREG
10
Figure 1. CS4244 Pinout
Top-Down
View
Pin Description
CS4244
AOUT2+
30
AOUT2-
29
AOUT3+
28
AOUT3-
27
AOUT4+
26
AOUT4-
25
VBIAS
24
VREF
23
VQ
22
GND
21
11
11
5
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