A14 Frequency Reference Board; A23 Test Set Motherboard - Keysight Technologies N5224/5A Service Manual

2-port and 4-port pna - microwave network analyzers
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Theory of Operation
Synthesized Source Group Operation

A14 Frequency Reference Board

This assembly provides stable reference frequencies to the rest of the
instrument. A high stability 10 MHz oven-controlled crystal oscillator (OCXO)
normally provides the frequency standard. However, if a 10 MHz external
reference signal is detected at the 10 MHz EXT REF IN port on the rear panel, it
is used as the frequency reference instead.
The 10 MHz reference signal is used to phase lock a 100 MHz VCO. The output
of this VCO is then divided by ten to produce the 10 MHz EXT REF OUT rear
panel signal and also a 10 MHz reference signal for the A16 signal processing
ADC module (SPAM) board. The VCO output is also divided by two to produce
50 MHz reference signals for the A4, A15, and A17 13.5 GHz synthesizer
boards.
Rear-Panel Interconnects
10 MHz REF INPUT
10 MHz REF OUTPUT

A23 Test Set Motherboard

The A23 test set motherboard serves these functions:
— to act as an interface between the A21 CPU board and the auxiliary rear
— to provide ALC signals to the A25 HMA26.5.
— to route control signals to the signal separation group. Refer to
Rear Panel Interconnects
The A23 test set motherboard includes the following rear panel interconnects.
TEST SET I/O
5-14
A BNC connector that allows an external frequency reference signal to be used to
phase lock the analyzer for increased frequency accuracy.
The analyzer automatically enables the external frequency reference feature when
a signal is connected to this input. When the signal is removed, the analyzer
automatically switches back to its internal frequency reference.
A BNC connector that allows a 10 MHz reference signal, produced by the A14
frequency reference board, to be output for use in phase locking external test
equipment.
panel interconnects.
Separation Group Operation" on page 5-18
A DB-25 female connector that is used to control external test sets. The external test set bus
consists of 13 multiplexed address and data lines, three control lines, and an open-collector
interrupt line. Pin assignments are listed in
Up to 16 test sets may be "daisy-chained" on the bus at one time.
The Test Set I/O is not compatible with 8753 network analyzer test sets.
for more information.
Table 5-1 on page
5-15.
Keysight N5224A/25A Service Guide
"Signal

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