Analog Devices MAX16165 Manual page 5

Evaluates: MAX16165/MAX16166
Detailed Description of Hardware
The MAX16165/MAX16166 PCB EV kit should be used with the following documents:
•
MAX16165/MAX161666 Data Sheet
•
MAX16165/MAX161666 EV Kit Data Sheet (this document)
The MAX16165/MAX16166 EV kit demonstrates sequencer operation of four power supplies during turn-on and turn-off.
During turn-off, the sequencer disables these four power supplies in reverse order.
Sequencer Operation
1. Power-On Sequencing
When the sequencer initiates power-on sequencing, the MAX16165/MAX16166 provide a capacitor-adjustable delay time
(t ) before the first output is enabled. Adjust the capacitor C2 in the EV kit for the required delay. When the power-on
DLY
sequence starts, the DLY has an internal switch in series with an internal current source of 4µA, which is connected to the
CDLY present at the DLY pin. This current charges the CDLY linearly until the voltage reaches the threshold of 0.5V and
signals to continue enabling the subsequent channel. Connect a capacitor (C
sequencing delay period (t
t = 40µ�� + 125��Ω × CDLY
DLY
is in seconds and CDLY is in Farads. Leave DLY unconnected for the minimum 40μs (typ) delay. The accuracy
where t
DLY
of t is affected by the CDLY capacitor leakage and tolerance. A low-leakage ceramic capacitor is recommended.
DLY
2. Power-Off Sequencing
When the sequencer initiates power-off sequencing, the MAX16165/MAX16166 provide the delay time t
output is disabled. Select the RIOS using the following formula and R13 in the EV kit for proper power-off sequencing.
IOFFSET current = 5µA.
0.5��
RIOS = ( )
��������������
3. Sequencer Only Operation
To operate in this mode, do not install the jumper JEN_. JEN1, JEN2, JEN3, and JEN4 should be kept floating. This isolates
the LDO's connection with MAX16165/MAX16166 IC. See
Table 2. LED Indicator Status
STATUS LED
DS1 (OUT1)
DS2 (OUT2)
DS3 (OUT3)
DS4 (OUT4)
DS5 (DONE)
DS6 (POK)
DS7 (FAULT)
UVSET
The MAX16165/MAX16166 also monitor UVSET input for an undervoltage condition after power-up. UVSET is supplied with
VDD through a resistor divider R1 and R2 on the EV kits. R1 and R2 are configured to obtain approximately 0.5V at the
UVSET pin.
Table 3. UVSET Jumper Description/Connection Guide
JUMPER
UVSET
*Default position
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) that occurs between sequenced channels. Use the following formula to estimate the delay:
DLY
This Green LED indicates the status of OUT1, turns on when it is HIGH.
This Green LED indicates the status of OUT2, turns on when it is HIGH.
This Green LED indicates the status of OUT3, turns on when it is HIGH.
This Green LED indicates the status of OUT4, turns on when it is HIGH.
This Green LED indicates the status of DONE, turns on when it is HIGH.
This Green LED indicates the status of POK, turns on when it is HIGH.
This Red LED indicates the status of FAULT, turns on when it is LOW.
SHUNT POSITION
1-2*
2-3
MAX16165/MAX16166 Evaluation Kit
) between DLY and GND to adjust the
DLY
Table 1 for a connection guide.
DESCRIPTION
Connects VDD power supply to UVSET through resistor divider
Connects ABP to UVSET
before the fourth
DLY
DESCRIPTION
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