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3
BIOS Setup
DRAM Frequency
This field is used to select the clock speed of the DDR SDRAM
DIMM.
By SPD
100 MHz
133 MHz
166 MHz
200 MHz
DRAM Timing Control
This field is used to select the timing of the DRAM.
By SPD
Manual
60
The EEPROM on a DIMM has SPD (Serial Pres-
ence Detect) data structure that stores informa-
tion about the module such as the memory
type, memory size, memory speed, etc. When
this option is selected, the system will run ac-
cording to the information in the EEPROM. This
option is the default setting because it provides
the most stable condition for the system.
The
memory clock speed will run at 200MHz.
The
memory clock speed will run at 266MHz.
The
memory clock speed will run at 332MHz.
The
memory clock speed will run at 400MHz
DDR.
The EEPROM on a DIMM has SPD (Serial Pres-
ence Detect) data structure that stores informa-
tion about the module such as the memory
type, memory size, memory speed, etc. When
this option is selected, the system will run ac-
cording to the information in the EEPROM. This
option is the default setting because it provides
the most stable condition for the system. The
"DRAM CAS Latency" to "RAS to CAS Delay
(tRCD)" fields will show the default settings by
SPD.
If you want your system to run at a perform-
ance better than the one "by SPD", select
"Manual" then select the best option in the
"DRAM CAS Latency" to "RAS to CAS Delay
(tRCD)" fields.
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