Advantech ASMB-610 User Manual page 43

Lga 1200 intel® xeon® w & 10th gen. core™ proprietary server board with 4 x ddr4, 1 x pciex16, 2 x pciex4, 5 x usb 3.2, 3 x sata 3, quad lans and ipmi
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well before the CPU needs it, so that it can improve the load-to-use latency. You
may choose to enable or disable it.
Adjacent Cache Line Prefetch
The Adjacent Cache-Line Prefetch mechanism, like automatic hardware
prefetch, operates without programmer intervention. When enabled through the
BIOS, two 64-byte cache lines are fetched into a 128-byte sector, regardless of
whether the additional cache line has been requested or not. You may choose to
enable or disable it.
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ASMB-610 User Manual

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