Adp3 Board - Safran CORTEX RTR NeXt Series User Manual

Radio telemetry receiver
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4.4

ADP3 Board.

Overview: The digital signal processing ADP3 board performs the functions of A/D conversion, digital
filtering, digital pre and post-detection combining, digital demodulation (AM/FM/PM/PSK/...) and video
processing.
Description: The Master FPGA (Xilinx VIRTEX7 Family) performs all the digital signal processing
(demodulation, combining, filtering, IF reconstruction...).
The main functions performed by the ADP3 board are:
10MHz reference frequency clock with external 5/10MHz looking compatibility.
4 IF/AUX (DC-120MHz) 12 bits analog to digital conversion sampled at 250MHz.
IRIG-B time 12bits analog to digital conversion sampled at 50MHz.
4 AGC bus control (interfaces with Tuner boards).
4 Base band (DC-50kHz) 12 bits digital to analog conversion sampled at 312.5 kHz.
4 Video (DC-36MHz) 12 bits digital to analog conversion with coupling and matching selection sampled at
100MHz.
1 IF 12 bits digital to analog conversion sampled at 250MHz (reconstructed signal).
8 output data with output matching TTL/RS422 selection.
Giga Bit Ethernet for UDP based data transfer.
External interfaces (I/O AGC bus control, LVDS I/O, 2 SATA access...)
The PCI express bus monitoring allows Master FPGA binary code loading including the Signal
processing parameters, States and alarms control and High data rate burst (DMA).
© Safran Data Systems – IMP000074 e14r1
Radio Telemetry Receiver
User's Manual
This document is the property of
It cannot be duplicated or distributed without expressed written consent.
Ref.
D104004
Is.Rev
07
Previous Ref.:
DTU000567
Date:
21/06/2021
Safran Data Systems
.
Page 37

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