Board Configurations; E1 75 Ω Mode Setup; Table 4. E1 75 Ω Operational Mode Switch/Jumper Position - Cirrus Logic CS61880 Manual

Octal e1 line interface evaluation board
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6. BOARD CONFIGURATIONS

6.1 E1 75 Ω Ω Ω Ω Mode Setup
Table 4
shows the position of the different switches
and jumpers used to set up the CDB61880 evalua-
Table 4. E1 75 Ω Ω Ω Ω Operational Mode Switch/Jumper Position
Switches/Jumpers
S15 (MODE)
S1 (0)
S2 (1)
S3 (2)
S4 (3)
S5 (4)
S6 (5)
S7 (6)
S8 (7)
S9 #1 (MOT_\INTL)
S9 #2 (MUX)
S9 #3 (A4)
S9 #4 (A3)
S9 #5 (A2)
S9 #6 (A1)
S9 #7 (A0)
S10 (JASEL)
S11 (CBLSEL)
J13 (VLOGIC)
J1 (MCLK)
J93 (CLKE)
J23 (TXOE)
3. Connect a standard 25-pin male to female parallel port cable to connector J12 and the control PC.
4. Set "HIGH" to enable BITS Clock Recovery function for only Channel #0 in Hardware Mode.
5. Other settings may be used to enter G.772 Non-Intrusive Monitoring in Hardware Mode. Refer to the
CS61880 Data Sheet for other settings.
6. Set "LOW" to disable receiver Internal line impedance matching function. The external resistors for all
eight receivers must be changed to 9.31 Ω to properly match the input line impedance.
18
Hardware
HARDWARE
LOOP FUNCTION
LOOP FUNCTION
LOOP FUNCTION
LOOP FUNCTION
LOOP FUNCTION
LOOP FUNCTION
LOOP FUNCTION
LOOP FUNCTION
HIGH
LOW (Note 4)
LOW (Note 5)
LOW (Note 5)
LOW (Note 5)
LOW (Note 5)
LOW (Note 5)
ANY POSITION
HIGH (Note 6)
3 V
OSCILLATOR
OPEN
OPEN
tion board to operate in E1 75 Ω Hardware, Serial
Host and Parallel Host operational modes. Before
selecting Host mode, the switches in
bold should be set to the position stated.
Serial Host (Note 3)
SERIAL HOST
NONE
NONE
NONE
NONE
NONE
NONE
NONE
NONE
HIGH
HIGH
HIGH
HIGH
HIGH
HIGH
HIGH
OPEN
NC
3 V
OSCILLATOR
OPEN
OPEN
CDB61880
Table 4
in
Parallel Host (Note 3)
PARALLEL HOST
NONE
NONE
NONE
NONE
NONE
NONE
NONE
NONE
MOTOROLA/INTEL
MUX/NON-MUX
HIGH
HIGH
HIGH
HIGH
HIGH
OPEN
NC
3 V
OSCILLATOR
OPEN
OPEN
DS450DB1

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