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Cirrus Logic CDB43L21 Manual

Evaluation board for the cs43l21
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Evaluation Board for the CS43L21
Features
MUX'd Analog Output
–
Stereo RCA Output (w/Optional Load or
LPF)
–
Stereo Headphone Jack
–
Mono Speaker Driver w/Banana Posts
8 kHz to 96 kHz S/PDIF Interface
–
CS8415 Digital Audio Receiver
I/O Stake Headers
–
External Control Port Accessibility
–
External DSP Serial Audio I/O Accessibility
Independent, Regulated Supplies
1.8 V to 3.3 V Logic Interface
Hardware Control
–
11 Pre-Defined Switch Settings
FlexGUI S/W Control - Windows
–
Pre-Defined & User-Configurable Scripts
Layout and Grounding Recommendations
Software Mode
Control Port
S/PDIF Input
(CS8415)
Oscillator
(socket)
http://www.cirrus.com
®
Compatible
Reset
Hardware Mode
Switches
FPGA
Reset
MCLK
Clocks/Data Header
Copyright © Cirrus Logic, Inc. 2008
Description
The CDB43L21 evaluation board is an excellent means
for evaluating the CS43L21 DAC. Evaluation requires a
digital signal source, analog analyzer, and power sup-
plies. Optionally, a Windows PC-compatible computer
may be used to evaluate the CS43L21 in Software
Mode.
System timing can be provided by the CS8415, by the
CS43L21 with supplied master clock, or by an I/O stake
header with a DSP connected.
RCA phono jacks are provided for the CS43L21 analog
outputs. 1/8th inch jacks are also available for head-
phone output. Digital data input is available via RCA
phono or optical connectors to the CS8415.
The Windows software provides a Graphical User Inter-
face (GUI) to make configuration of the CDB43L21
easy. The software communicates through the PC's se-
rial port/USB to configure the control port registers so
that all the features of the CS43L21 can be evaluated.
The evaluation board may also be configured to accept
external timing and data signals for operation in a user
application during system development.
ORDERING INFORMATION
CDB43L21
I²C/SPI Header
Reset
MCLK
CS43L21
Reset
(All Rights Reserved)
CDB43L21
Evaluation Board
Analog Output
(Line + Headphone)
JANUARY '08
DS723DB1

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Summary of Contents for Cirrus Logic CDB43L21

  • Page 1 Evaluation Board for the CS43L21 Features Description MUX’d Analog Output The CDB43L21 evaluation board is an excellent means for evaluating the CS43L21 DAC. Evaluation requires a – Stereo RCA Output (w/Optional Load or digital signal source, analog analyzer, and power sup- LPF) plies.

  • Page 2: Table Of Contents

    3.1 FPGA H/W Control ......................... 11 3.2 CS43L21 H/W Control ........................11 4. SYSTEM CONNECTIONS ........................14 5. JUMPER SETTINGS ..........................14 6. CDB43L21 BLOCK DIAGRAM ......................15 7. CS43L21 SCHEMATICS ........................16 8. CDB43L21 LAYOUT ..........................22 9. ERRATA ............................... 25 10.
  • Page 3 CDB43L21 9. ERRATA ............................... 25 10. REVISION HISTORY .......................... 25 LIST OF FIGURES Figure 1.General Configuration Tab ......................8 Figure 2.DAC Volume Controls Tab ......................9 Figure 3.Register Maps Tab - CS43L21 ....................10 Figure 4.Routing 1 ............................. 12 Figure 5.Routing 2 ............................. 12 Figure 6.

  • Page 4: System Overview

    CDB43L21 1. SYSTEM OVERVIEW The CDB43L21 evaluation board is an excellent means for evaluating the CS43L21. Digital audio signal interfaces are provided, and an FPGA is used for easily configuring the board. Section 2. “Software Mode Control” on page 7 Section 3.

  • Page 5: Cs8415 Digital Audio Receiver

    CDB43L21 Section 2. “Software Mode Control” on page 7 Section 3. “Hardware Mode Control” on page 11 provide configuration details. CS8415 Digital Audio Receiver A complete description of the CS8415 receiver (Figure 12 on page 18) and a discussion of the digital audio interface are included in the CS8415 data sheet.

  • Page 6: Stand-Alone Switches

    1.10 Control Port Connectors A graphical user interface is available for the CDB43L21, allowing easy manipulation of each register. This GUI interfaces with the CDB via the RS-232 connector and controls all Software Mode options. Section 2.

  • Page 7: Software Mode Control

    9. Set up the CS43L21 in the “General Configurations” and “DAC Volume Controls” tab as desired. 10. Begin evaluating the CS43L21. For quick setup, the CDB43L21 may be configured by loading a predefined sample script file: 11. On the File menu, click "Restore Board Registers..."...

  • Page 8: General Configuration Tab

    CDB43L21 General Configuration Tab The “General Configuration” tab provides high-level control of signal routing on the CDB43L21. This tab also includes basic controls for the CS43L21 for quickly setting up the CDB43L21 in simple configurations. Sta- tus text detailing the CS43L21’s specific configuration is shown in parenthesis or appears directly below the associated control.

  • Page 9: Dac Volume Controls Tab

    CDB43L21 DAC Volume Controls Tab The “DAC Volume Controls” tab provides high-level control of all volume settings in the CS43L21. Status text detailing the CS43L21’s specific configuration is shown in read-only edit boxes, in parenthesis, or it ap- pears directly below the associated control. This text will change depending on the setting of the associated control.

  • Page 10: Register Maps Tab

    CDB43L21 Register Maps Tab The Advanced Register Debug tab provides low-level control of the CS43L21 individual register settings. Register values can be modified bit-wise or byte-wise. For bit-wise, click the appropriate push-button for the desired bit. For byte-wise, the desired hex value can be typed directly into the register address box in the register map.

  • Page 11: Hardware Mode Control

    Control” and “CS43L21 H/W Control.” These switches are enabled in Hardware Mode only and ignored in Software Mode. The CDB43L21 automatically enters Hardware Mode upon initial power up, when exiting Software Mode, upon termination of the Cirrus FlexGUI software, or by disconnecting the RS-232 serial cable.

  • Page 12: Figure 4.Routing 1

    CDB43L21 Oscillator Oscillator CS8415 CS8415 CS43L21 CS43L21 RMCK RMCK MCLK MCLK (256Fs) (256Fs) OLRCK/ OLRCK/ LRCK/SCLK LRCK/SCLK OSCLK OSCLK SDOUT SDOUT SDIN SDIN (LJ) (LJ) I/O Header I/O Header MCLK MCLK LRCK/SCLK LRCK/SCLK SDIN SDIN Figure 4. Routing 1 Figure 5. Routing 2...

  • Page 13: Figure 8.Routing 5

    CDB43L21 Oscillator CS8415 CS43L21 RMCK MCLK (256Fs) OLRCK/ LRCK/SCLK OSCLK SDOUT SDIN (LJ) I/O Header MCLK LRCK/SCLK SDIN Figure 8. Routing 5 DS723DB1...

  • Page 14: System Connections

    CDB43L21 4. SYSTEM CONNECTIONS CONNECTOR INPUT/OUTPUT SIGNAL PRESENT Input +5.0 V Power Supply Input Ground Reference RS232 Input/Output Serial connection to PC for SPI / I²C control port signals Input/Output USB connection to PC for SPI / I²C control port signals...

  • Page 15: Cdb43L21 Block Diagram

    6. CDB43L21 BLOCK DIAGRAM Software Mode I²C/SPI Header Control Port Reset Reset MCLK Hardware Mode Switches Analog Output CS43L21 (Line + Headphone) S/PDIF Input FPGA (CS8415) Reset MCLK Reset Oscillator (socket) Clocks/Data Header Figure 9. Block Diagram...

  • Page 16: Cs43L21 Schematics

    7. CS43L21 SCHEMATICS Figure 10. CS43L21 and Analog I/O (Schematic Sheet 1)

  • Page 17: Figure 11.S/Pdif I/O (Schematic Sheet 2)

    Figure 11. S/PDIF I/O (Schematic Sheet 2)

  • Page 18: Figure 12.Fpga (Schematic Sheet 3)

    Figure 12. FPGA (Schematic Sheet 3)

  • Page 19: Figure 13.Level Shifters & I/O Stake Header (Schematic Sheet 4)

    Figure 13. Level Shifters & I/O Stake Header (Schematic Sheet 4)

  • Page 20: Figure 14.Control Port I/O (Schematic Sheet 5)

    Figure 14. Control Port I/O (Schematic Sheet 5)

  • Page 21: Figure 15.Power (Schematic Sheet 6)

    Figure 15. Power (Schematic Sheet 6)

  • Page 22: Cdb43L21 Layout

    8. CDB43L21 LAYOUT CDB43L21 CS43L21 CS43L21 CS43L21 Figure 16. Silk Screen...

  • Page 23: Figure 17.Top-Side Layer

    Figure 17. Top-Side Layer...

  • Page 24: Figure 18.Bottom-Side Layer

    Figure 18. Bottom-Side Layer...

  • Page 25: Errata

    ING ATTORNEYS’ FEES AND COSTS, THAT MAY RESULT FROM OR ARISE IN CONNECTION WITH THESE USES. Cirrus Logic, Cirrus, and the Cirrus Logic logo designs are trademarks of Cirrus Logic, Inc. All other brand and product names in this document may be trademarks or service marks of their respective owners.

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