Cirrus Logic CDB43L22 Manual

Evaluation board for cs43l22
Table of Contents

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Features
Analog Passthrough Input
Four Stereo Line Input Jacks
Channel Mixer
Analog Output
Stereo Headphone Jack w/ HP Detect
Capability
Speaker Output via Differential Stereo
PWM Terminals and Audio Jacks
8- to 96-kHz S/PDIF Interface
Optical and RCA S/PDIF Input Jacks
CS8416 Digital Audio Receiver
I/O Stake Headers
External Control Port Accessibility
External DSP Serial Audio I/O Accessibility
Multiple Power Supply options via Battery or
External Power Supplies.
1.8 V to 3.3 V Logic Interface
FlexGUI S/W Control - Windows
Pre-Defined & User-Configurable Scripts
S/PDIF Input
http://www.cirrus.com
Evaluation Board for CS43L22
®
Compatible
Reset
USB
µ controller
Oscillator
PLL
(socket)
FPGA
(CS8416)
Clk/Data
SRC
PSIA Input
(CS8421)
Header
Copyright © Cirrus Logic, Inc. 2007
Description
Using the CDB43L22 evaluation board is an ideal way
to evaluate the CS43L22. Use of the board requires an
analog/digital signal source, an analyzer and power
supplies. A Windows PC-compatible computer is also
required in order to configure the CDB43L22.
System timing can be provided by the CS8416, by the
CS43L22 with supplied master clock, or via an I/O stake
header with a DSP connected. 1/8th inch audio jacks
are provided for the analog passthrough inputs and
HP/Line outputs. Two pairs of banana jacks and an ad-
ditional pair of 1/8th inch audio jacks are provided to
monitor the stereo differential speaker PWM output
from the CS43L22. Digital input connections are via
RCA phono or optical connectors to the CS8416
(S/PDIF Rx).
The Windows-based software GUI provided makes
configuring the CDB43L22 easy. The software commu-
nicates through the PC's USB port to configure the
board and FPGA registers so that all features of the
CS43L22 can be evaluated. The evaluation board may
also be configured to accept external timing and data
signals for operation in a user application during system
development.
ORDERING INFORMATION
CDB43L22
2
I
C Interface
CS43L22
External System
Input Header
(All Rights Reserved)
CDB43L22
Analog
Passthrough
Input
Speaker
Outputs
Analog Output
(Line + Headphone)
Reset
Evaluation Board
OCTOBER '07
DS792DB1

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Summary of Contents for Cirrus Logic CDB43L22

  • Page 1 Evaluation Board for CS43L22 Features Description Analog Passthrough Input Using the CDB43L22 evaluation board is an ideal way – Four Stereo Line Input Jacks to evaluate the CS43L22. Use of the board requires an analog/digital signal source, an analyzer and power –...
  • Page 2: Table Of Contents

    4.4 Analog and PWM Output Volume Tab ................... 15 4.5 Register Maps Tab ......................... 16 5. SYSTEM CONNECTIONS AND JUMPERS ..................17 6. JUMPER SETTINGS ........................... 18 7. CDB43L22 BLOCK DIAGRAM ......................19 8. CDB43L22 SCHEMATICS ........................20 9. CDB43L22 LAYOUT ..........................24 10. PERFORMANCE PLOTS ........................29 11.
  • Page 3 CDB43L22 Figure 21.THD+N vs. HP Output Power ....................29 Figure 22.Freq. Resp. - S/PDIF Input to HP Output .................. 29 Figure 23.THD+N - S/PDIF Input to HP Output ..................29 Figure 24.Dynamic Range- S/PDIF Input to HP Output ................29 Figure 25.FFT - S/PDIF In to Speaker Out @ 0 dBFS ................
  • Page 4: System Overview

    CS43L22. On-board peripherals are powered from the USB connection which also serves as an interface to a PC. The CDB43L22 is configured using Cirrus Logic’s Windows- compatible FlexGUI software to read/write to device registers.
  • Page 5: Cs8416 Digital Audio Receiver

    Analog Outputs The CDB43L22 has a stereo headphone/line output jack (J40) and a dedicated stereo headphone (HP) out- put jack (J21) to monitor the CS43L22’s ground centered analog output. The dedicated HP jack (J21) has circuitry that drives the SPKR/HP pin low when a stereo jack is inserted thereby allowing users to test the CS43L22’s HP detect capability.
  • Page 6: Control Port Connectors

    (except for VP). The minimum current required is approximately 300 mA. It may, there- fore, be necessary to connect the CDB43L22 directly to the USB port on the PC as opposed to a hub or keyboard port where current may be limited.
  • Page 7: Quick Start Guide

    CDB43L22 2. QUICK START GUIDE The following figure is a simplified quick start up guide made for user convenience. The following start up guide con- figures the board with a 1.8 V power supply to VL, VA, VA_HP and VD. The user may choose from steps 9 through 13 depending on the desired measurement.
  • Page 8: Configuration Options

    CDB43L22 3. CONFIGURATION OPTIONS In order to configure the CDB43L22 for making performance measurements, one needs to use Cirrus Logic’s Win- dows compatible FlexGUI software to program the various components on the board. This section serves to give a deeper understanding of the on-board circuitry and the digital clock and data signal routing involved in the different configuration modes of the CDB43L22.
  • Page 9: Spdif In To Stereo Speaker Out

    Ch. B SPDIF In to Stereo Speaker Out Figure 2. Table 2 shows the expected performance characteristics one should expect when using the CDB43L22 for SPDIF In to Stereo Speaker Out measurements. Plot Location FFT - S/PDIF In to Speaker Out @ 0 dBFS...
  • Page 10: Spdif In To Mono Speaker Out

    Spkr B SPDIF In to Mono Speaker Out Figure 3. Table 3 shows the expected performance characteristics one should expect when using the CDB43L22 for SPDIF In to Mono Speaker Out measurements. Plot Location THD+N vs. Output Power- S/PDIF In to Speaker Out...
  • Page 11: Software Mode Control

    “Analog and PWM Output Volume” tab as desired. 8. Begin evaluating the CS43L22. For quick set-up, the CDB43L22 may, alternatively, be configured by loading a predefined sample script file: 9. On the File menu, click "Restore Board Registers..." 10. Browse to Boards\CDB43L22\Scripts\.
  • Page 12: Board Configuration Tab

    CDB43L22 Board Configuration Tab The “Board Configuration” tab provides high-level control of signal routing on the CDB43L22. This tab also includes basic controls that allow “quick setup” in a number of simple board configurations. Status text de- tailing the CS43L22’s specific configuration appears directly below the associated control. This text may change depending on the setting of the associated control.
  • Page 13: Passthrough, Power And Serial Audio Interface Configuration Tab

    CDB43L22 Passthrough, Power and Serial Audio Interface Configuration Tab The “Passthrough, Power and Serial Audio Interface Configuration” Tab provides high-level control of the CS43L22 passthrough, power control and serial port register settings. Status text detailing the CS43L22’s specific configuration is shown in parenthesis or appears directly below the associated control. This text will change depending on the setting of the associated control.
  • Page 14: Dsp Engine Tab

    CDB43L22 DSP Engine Tab The “DSP Engine” tab provides high-level control of the SDIN (PCM) data volume level, the PCM mix vol- ume level and the overall DAC/PWM channel volume level. DAC/PWM channel Limiter, Tone Control and Beep Generator control functions are also provided. Status text detailing the CS43L22’s specific configura- tion is shown in parenthesis or inside the control group of the affected control.
  • Page 15: Analog And Pwm Output Volume Tab

    CDB43L22 Analog and PWM Output Volume Tab The “Analog and PWM Output Volume” tab provides high-level control of the CS43L22 PWM outputs, HP/Line output volume levels and charge pump frequency. This tab also provides controls for the PWM out- put including speaker volume and PWM gain. Temperature and Battery monitoring controls for the PWM/Speaker outputs are also on this tab.
  • Page 16: Register Maps Tab

    CDB43L22 Register Maps Tab The Register Maps tabs provide low-level control of the CS43L22, CS8416, CS8421, FPGA and GPIO reg- ister settings. Register values can be modified bit-wise or byte-wise. “Left-clicking” on a particular register accesses that register and shows its contents at the bottom. The user can change the register contents by using the push-buttons, by selecting a particular bit and typing in the new bit value or by selecting the reg- ister in the map and typing in a new hex value.
  • Page 17: System Connections And Jumpers

    CDB43L22 5. SYSTEM CONNECTIONS AND JUMPERS CONNECTOR INPUT/OUTPUT SIGNAL PRESENT Input +2.7 V to +5.25 V Power Supply. Input Ground Reference. Input/Output USB connection to PC for I²C control port signals. S/PDIF OPTICAL IN OPT3 Input CS8416 digital audio input via optical cable.
  • Page 18: Jumper Settings

    CDB43L22 6. JUMPER SETTINGS LABEL PURPOSE POSITION FUNCTION SELECTED *+1.8V Voltage source is +1.8 V regulator. Selects source of voltage for the +2.5V Voltage source is +2.5 V regulator. VL supply +3.3V Voltage source is +3.3 V regulator. *+1.8V Voltage source is +1.8 V regulator.
  • Page 19: Cdb43L22 Block Diagram

    7. CDB43L22 BLOCK DIAGRAM Reset µ controller C Interface Oscillator (socket) Analog Passthrough Input Speaker CS43L22 Outputs FPGA Analog Output S/PDIF Input (Line + Headphone) (CS8416) Reset Clk/Data PSIA Input External System Header Input Header (CS8421) Figure 9. Block Diagram...
  • Page 20: Cdb43L22 Schematics

    8. CDB43L22 SCHEMATICS Figure 10. CS43L22 & Analog I/O (Schematic Sheet 1)
  • Page 21: Figure 11.S/Pdif & Digital Interface (Schematic Sheet 2)

    Figure 11. S/PDIF & Digital Interface (Schematic Sheet 2)
  • Page 22: Figure 12.Micro & Fpga Control (Schematic Sheet 3)

    Figure 12. Micro & FPGA Control (Schematic Sheet 3)
  • Page 23: Figure 13.Power (Schematic Sheet 4)

    Figure 13. Power (Schematic Sheet 4)
  • Page 24: Cdb43L22 Layout

    9. CDB43L22 LAYOUT CDB43L22 CS43L22 Figure 14. Silk Screen...
  • Page 25: Figure 15.Top-Side Layer

    Figure 15. Top-Side Layer...
  • Page 26: Figure 16.Gnd (Layer 2)

    Figure 16. GND (Layer 2)
  • Page 27: Figure 17.Power (Layer 3)

    Figure 17. Power (Layer 3)
  • Page 28: Figure 18.Bottom-Side Layer

    Figure 18. Bottom-Side Layer...
  • Page 29: Performance Plots

    CDB43L22 10.PERFORMANCE PLOTS Test conditions (unless otherwise specified): Measurement bandwidth is 20 Hz to 20 kHz (unweighted); = 16 Ω. VA=VD=VA_HP=1.8V; Sample Frequency = 48 kHz; HP test load: R -100 -100 -110 -110 -120 -120 -130 -130 -140 -140 Figure 19.
  • Page 30: Figure 25.Fft - S/Pdif In To Speaker Out @ 0 Dbfs

    CDB43L22 -100 -110 -120 -130 -140 -100 Figure 25. FFT - S/PDIF In to Speaker Out @ 0 dBFS Figure 26. FFT - S/PDIF In to Speaker Out @ -60 dBFS +4.5 +3.5 +2.5 +1.5 +0.5 -0.5 -1.5 -2.5 0.05 -3.5...
  • Page 31: Revision History

    OTHER AGENTS FROM ANY AND ALL LIABILITY, INCLUDING ATTORNEYS’ FEES AND COSTS, THAT MAY RESULT FROM OR ARISE IN CONNECTION WITH THESE USES. Cirrus Logic, Cirrus, and the Cirrus Logic logo designs are trademarks of Cirrus Logic, Inc. All other brand and product names in this document may be trademarks or service marks of their respective owners.
  • Page 32 Mouser Electronics Authorized Distributor Click to View Pricing, Inventory, Delivery & Lifecycle Information: Cirrus Logic CDB43L22...

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