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ESM-TGH User's Manual
SMB_SCL_S5
SMB_SDA_S5
SMB_ALERT#
ESPI_RST#
PWR_OK
SYS_RESET#
WAKE0#
WAKE1#
2.3.2.1.8 SATA Signals
Signal
SATA[0:3]_TX +/-
SATA[0:3]_RX +/-
ATA_ACT#
2.3.2.1.9 USB Signals
Signal
USB[0:7] +/-
USB_0_1_OC#
USB_2_3_OC#
USB_4_5_OC#
USB_6_7_OC#
2.3.2.1.10 I2C Signals
Signal
I2C_CLK
I2C_DATA
2.3.2.1.11 USB3.0 Signals
Signal
USB_SSTX[0:1]+
USB_SSTX[0:1]-
USB_SSRX[0:1]+
USB_SSRX[0:1]-
24 ESM-TGH User's Manual
System Management Bus bidirectional clock line.
System Management Bus bidirectional data line.
System Management Bus Alert - input can be used to generate an SMI# (System
Management Interrupt) or to wake the system.
ESPI Mode: eSPI Reset Reset the eSPI interface for both master and slaves.
eSPI Reset# is typically driven from eSPI master to eSPI slaves
Power OK from main power supply
Reset button input. Active low input.
PCI Express wake up signal.
General purpose wake up signal.
Serial ATA Channel 0-3 transmit differential pair.
Serial ATA Channel 0-3 receive differential pair.
ATA (parallel and serial) activity indicator, active low.
USB differential pairs, channels 0 through 7
USB over-current sense, USB channels 0 and 1
USB over-current sense, USB channels 2 and 3
USB over-current sense, USB channels 4 and 5
USB over-current sense, USB channels 6 and 7
General purpose I2C port clock output.
General purpose I2C port data I/O line.
Additional transmit signal differential pairs for the SuperSpeed USB data path.
Additional receive signal differential pairs for the SuperSpeed USB data path.
Signal Description
Signal Description
Signal Description
Signal Description
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