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Circuit Note
SOFTWARE OVERVIEW
The FPGA reference designs provided for use with the CN0506
configure each ADIN1300 independently. Each PHY (ADIN1300)
is connected to a designated MAC interface, and there are three
supported interface modes between the ADIN1300 and the FPGA:
RGMII, MII, and RMII.
For each mode, there is a separate hardware design language
(HDL) because some modes require converters (for example, Giga-
bit MII (GMII) to RGMII). The operating mode must be selected in
the HDL to match the mode users wish to use in Linux.
The EVAL-CN0506-FMCZ connects to a standard low pin count
(LPC) FMC connector, which makes the software design portable to
many different FPGA development boards.
The Linux device tree supported for the different modes and carrier
combinations can be found on the
information on the standard Analog Devices, Inc., Linux image, see
the
FPGA Image user
guide.
BOARD LAYOUT CONSIDERATIONS
Ethernet signal layout is critical, especially at gigabit speeds. Sig-
nals are routed to RJ45 jacks as 100 Ω, controlled impedance pairs.
Data and clock signals to the carrier, while operating at lower clock
rates, have edge rates that necessitate careful layout. Signals on
the EVAL-CN0506-FMCZ are kept as short as possible, while signal
trace length and impedance matching on the carrier board must be
carefully considered when connecting the CN0506. These factors
are important to the overall speed and performance of the CN0506,
but must be considered separately.
Figure 4
shows the 1000BASE-T maximum drop point from V2 to
V1 at 98.7%.
Table 2. EVAL-CN0506-FMCZ Evaluation System with 4 Meter Cable
Speed
(Mbps)
Mode
FC_FRM_CNT_H
1000
RGMII
744
100
RGMII
74
10
RGMII
7
100
MII
74
10
MII
7
Table 3. EVAL-CN0506-FMCZ Evaluation System with 154 Meter Cable
Speed
(Mbps)
Mode
FC_FRM_CNT_H
1000
RGMII
744
100
RGMII
74
10
RGMII
7
100
MII
74
10
MII
7
analog.com
CN0506 HDL
page. For more
Local Ethernet PHY
FC_FRM_CNT_L
RX_ERR_CNT
6314
26853
2890
26849
28900
Local Ethernet PHY
FC_FRM_CNT_L
RX_ERR_CNT
7693
26847
28900
26849
268900
Figure 4. Peak PHY Differential Output Voltage
PERFORMANCE RESULTS
Several tests were conducted using the CN0506, including a mode
verification test, a speed test, and a cable length drive test.
The EVAL-CN0506-FMCZ was tested at different modes with in-
creasing cable lengths and with no packet loss. The results are
detailed in
Table 2
and
meter cable, respectively.
Table 2
and
Table 3
show the frame checker count registers
(FC_FRM_CNT_H and FC_FRM_CNT_L) and the receive error
count register (RX_ERR_CNT) readback values of the ADIN1300
at the local and remote Ethernet PHY locations for a short cable
transmission and a long cable transmission, respectively.
Remote Ethernet PHY
FC_FRM_CNT_H
0
744
0
74
0
7
0
74
0
7
Remote Ethernet PHY
FC_FRM_CNT_H
0
744
0
74
0
7
0
74
0
7
CN-0506
Table 3
for a 4 meter cable and for a 154
FC_FRM_CNT_L
RX_ERR_CNT
6314
0
26853
0
2890
0
26849
0
28900
0
FC_FRM_CNT_L
RX_ERR_CNT
7693
0
26847
0
28900
0
26849
0
268900
0
Rev. A | 4 of 6
Status
Pass
Pass
Pass
Pass
Pass
Status
Pass
Pass
Pass
Pass
Pass
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