Analog Devices AD9681 Quick Start Manual page 14

10. SPI Controller, Chip Power Mode - Digital Reset Selection
4. Note that other settings can be changed on the ADCBase 0 tab (see Figure 9) and the ADC A
through ADC D tabs (see Figure 11) to set up the part in the desired mode. The ADCBase 0 tab
settings affect the entire part, whereas the settings on the ADC A through ADC D tabs each affect
the selected channel only. The B1 (Bank1), B2 (Bank2) and All buttons at the right end of the
SPIController button row (as seen in Figure 10 and Figure 11) determine which bank of ADCs is
affected by the SPIController settings. The All button is pushed by default which means that the
ADCBase 0 tab settings affect all channels on both ADC banks. The settings in the ADC A through
ADC D will likewise affect their respective channels in both banks. For example, with the All button
pushed, settings in the ADC A tab will affect channels A1 and A2. If the All button is un-pushed and
the B1 (Bank1) button remains pushed, the settings in the ADC A tab will only affect channel A1.
See the data sheet, the
AN-877 Application
available settings.
11. SPI Controller, Example ADC A Page
5. Invoke a Digital Reset as shown in Figure 10 before testing. After selecting Reset, select Chip run
to return to normal operation.
6. To begin testing, click the Run or Continuous Run button in the VisualAnalog toolbar (see
Figure 12).
AN-878 Application
Note, Interfacing to High Speed ADCs via SPI, for additional information on the
Rev 13 Nov 2013 01:53 | Page 14
Note, High Speed ADC SPI Control Software, and the
Figure