Lpc/Espi Signals; Gpio Signals; Power & System Management Signals - Avalue Technology ESM-EHLC User Manual

2.3.2.1.5 LPC/eSPI Signals

Signal
LPC_FRAME#/
ESPI_CS0#
LPC_AD[0:3]/
ESPI_IO_[0:3]
LPC_CLK/
ESPI_CK
LPC_SERIRQ/
ESPI_CS1#
LPC_DRQ0#/
ESPI_ALERT0#
LPC_DRQ1#/
ESPI_ALERT1#

2.3.2.1.6 GPIO Signals

Signal
GPI[0:4]
GPO[0:4]
2.3.2.1.7 Power & System Management Signals
Signal
SUS_S3#
BATLOW#
PWRBTN#
LPC frame indicates the start of an LPC cycle
ESPI Mode: eSPI Master Chip Select Outputs Driving Chip Select0#. A low
selects a particular eSPI slave for the transaction. Each of the eSPI slaves is
connected to a dedicated Chip Selectn# pin
LPC multiplexed address, command and data bus
ESPI Mode: eSPI Master Data Input / Outputs These are bi-directional
input/output pins used to transfer data between master and slaves.
Multiplexed with LPC_AD[0:3]
LPC clock output - 33MHz nominal
ESPI Mode: eSPI Master Clock Output This pin provides the reference timing for
all the serial input and output operations
LPC serial interrupt
ESPI Mode: eSPI Master Chip Select Outputs Driving Chip Select# A low selects
a particular eSPI slave for the transaction. Each of the eSPI slaves is connected
to a dedicated Chip Selectn# pin
LPC serial DMA request.
ESPI Mode: eSPI pins used by eSPI slave to request service from the eSPI
master.
LPC serial DMA request.
ESPI Mode: eSPI pins used by eSPI slave to request service from the eSPI
master.
General purpose input pins.
General purpose output pins.
Indicates system is in Suspend to RAM state. Active low output.
Indicates that external battery is low
Power button to bring system out of S5 (soft off), active on rising edge.
ESM-EHLC User's Manual
Signal Description
Signal Description
Signal Description
ESM-EHLC User's Manual 23