Interrupt Triggering Edge Control; Interrupt Flag Bit - Advantech PCM-3753I-AE User Manual

96-channel digital i/o pci-104 module
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3.3.5 Interrupt Triggering Edge Control

The interrupt can be triggered by a rising edge or a falling edge of the
interrupt signal, selectable by the value written in the "triggering edge
control" bit in the interrupt control register, as shown in following table.
Table 3.4: Triggering Edge Control Bit Values
En (n = 0 ~ 3)
1
0

3.3.6 Interrupt Flag Bit

The "interrupt flag" bit is a flag indicating the status of an interrupt. It is
a readable and writable bit. Read the bit's value to find the status of the
interrupt; write "1" to this bit to clear the interrupt. This bit must be
cleared in the ISR to service the next incoming interrupt.
Table 3.5: Interrupt Flag Bit Values
F01, F02 and Fn (n = 0 ~ 3)
Read
Write
F01: pattern patch interrupt flag bit of port A0
F02: change of state interrupt flag bit of port B0
Fn: interrupt flag bit of port Cn (n = 0 ~ 3)
Triggering edge of interrupt signal
Rising edge trigger
Falling edge trigger
1
0
1
0
21
Interrupt Status
Interrupt exists
No interrupt
Clear interrupt
Don't care
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