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Related Manuals for Advantech PCM-3753I
Summary of Contents for Advantech PCM-3753I
- Page 1 PCM-3753I 96-channel Digital I/O PCI-104 Module User Manual...
- Page 2 This documentation and the software included with this product are copyrighted 2008 by Advantech Co., Ltd. All rights are reserved. Advantech Co., Ltd. reserves the right to make improvements in the prod- ucts described in this manual at any time without notice.
- Page 3 Product Warranty (2 years) Advantech warrants to you, the original purchaser, that each of its prod- ucts will be free from defects in materials and workmanship for two years from the date of purchase. This warranty does not apply to any products which have been repaired or...
- Page 4 Step 1. Visit the Advantech web site at www.advantech.com/support where you can find the latest information about the product. Step 2. Contact your distributor, sales representative, or Advantech's cus- tomer service center for technical support if you need additional assistance. Please have the following information ready before...
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Page 5: Table Of Contents
Table 2.1:Summary of Jumper Settings ....... 10 Setting the BoardID Switch (SW2)......... 11 Table 2.2:BoardID Setting (SW2) ....... 11 2.4.1 BoardID Register ............11 Table 2.3:BoardID register of PCM-3753I ....11 SW3 & SW4 Settings............12 Hardware Installation ............12 Chapter 3 Operation ............14 Overview ................. - Page 6 PCM-3753I User Manual...
- Page 7 General Information...
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Page 8: Chapter 1 General Information
Users can configure each port as input or output via software. Dry Contact Support for Digital Input Each digital input channel at the PCM-3753I accepts either 0 ~ 5 VDC wet contact or dry contact inputs. This dry contact capability allows the channel to respond to changes in external circuitry (e.g., the closing of a... - Page 9 Interrupt Functions Ensure Faster System Response Two lines of each port C (i.e., ports C0, C1, C2 and C3) are connected to an interrupt circuit. The “Interrupt Control Register” of the PCM-3753I controls how these signals generate an interrupt. More than one interrupt request signals can be generated at the same time, and then the software can process these request signals by ISR.
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Page 10: Features
• 50-pin pin header • BoardID switch 1.3 Applications • Industrial AC/DC I/O devices monitoring and controlling • Relay and switch monitoring and controlling • Parallel data transfer • TTL, DTL and CMOS logic signal sensing • Indicator LED driving PCM-3753I User Manual... -
Page 11: Specifications
1.4 Specifications I/O Channels 96 digital I/O lines Programming Mode 8255 PPI mode 0 Input Signal Logic level 0: 0.8 V max. Logic level 1: 2.0 V min. Output Signal Logic level 0: 0.44 V max. @ 24 mA (sink) Logic level 1: 3.76 V min. -
Page 12: Pin Assignments (Cn0~Cn3)
1.5 Pin Assignments (CN0~CN3) PCM-3753I User Manual... - Page 13 Installation...
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Page 14: Chapter 2 Installation
Chapter 2 Installation 2.1 Initial Inspection Before starting to install the PCM-3753I, make sure there is no visible damage on the card. We carefully inspected the card both mechanically and electrically before shipment. It should be free of marks and in perfect order on receipt. -
Page 15: Jumper Settings
2.3 Jumper Settings We designed the PCM-3753I with ease-of-use in mind. It is a "plug and play" card, i.e. the system BIOS assigns the system resources such as base address and interrupt automatically. The following section describes how to configure the card. You may want to refer to the figure below for help in identifying card components. -
Page 16: Table 2.1:Summary Of Jumper Settings
JP1 determines otherwise. (See JP1 below.) Jumper JP1 Restores Ports to Their Condition Prior to Reset Jumper JP1 gives the PCM-3753I a new and valuable capability. With JP1 enabled (i.e., by shorting the lower two pins of JP1), the PCM-3753I "memorizes"... -
Page 17: Setting The Boardid Switch (Sw2)
Table 2.2. When there are multiple cards on the same chassis, this BoardID setting is useful for identifying each card's device number. We set the PCM-3753I’s BoardID switch to 0 at the factory. If you need to adjust this setting, please see below. -
Page 18: Sw3 & Sw4 Settings
Remove the CPU card from the chassis (if necessary) to gain access to the card.s PCI-104 connector. Connect connector J1 of the PCM-3753I card to the PCI-104 con- nector. Carefully align the pins with the PC-104 connector. Slide the module into the connector. The module pins may not slide all the way into the connector;... - Page 19 Operation...
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Page 20: Chapter 3 Operation
24 programmable I/O pins that are divided into three 8-bit ports. The total 96 digital I/O pins on the PCM-3753I is divided into 12 ports, desig- nated PA0, PB0, PC0, PA1, PB1, PC1, PA2, PB2, PC2, PA3, PB3 and PC3. -
Page 21: Input/Output Control
A control word can be written to a port's configuration register (Base+3, 7, 11 and 15 respectively for ports 0, 1, 2 and 3 on the PCM-3753I, and Base+35, 39, 43 and 47 respectively for ports 0, 1, 2 and 3 on the PCM-3753IE) to set the port as an input or an output port, unless the ports are set as output ports via jumpers (refer to Section 2.3, Jumper Settings). -
Page 22: Dry Contact Support For Digital Input
(> 1.5 kW). It is advisable to connect a 1.5 kW resistor in parallel with such a voltage source to avoid a voltage rise inside the voltage source. PCM-3753I User Manual... -
Page 23: Interrupt Functions
3.3.3 Interrupt Control Registers The “Interrupt Control Registers” (Base + 16, 17, 18 and 19 for the PCM-3753I, and Base + 48, 49, 50 and 51 for the PCM-3753IE) control the interrupt signal sources, edges and flags. The following table shows the bit map of each interrupt control register. -
Page 24: Table 3.2:Interrupt Control Register Bit Map
En: triggering edge control bit (n = 0 ~ 3) Fn: interrupt flag bit of port Cn (n = 0 ~ 3) F01: pattern patch interrupt flag bit of port A0 F02: change of state interrupt flag bit of port B0 PCM-3753I User Manual... -
Page 25: Figure 3.2:Interrupt Sources
M01:M00 PC00 PC04 M11:M10 PC10 PC14 M21:M20 PC20 PC24 M31:M30 INT #A PC30 PC34 Pattern Match (PA0) Change of State (PB0) Figure 3.2: Interrupt sources Chapter 3... -
Page 26: Interrupt Source Control
3.3.4 Interrupt Source Control The “mode bits” in the interrupt control registers determine the allowable sources of signals generating an interrupt. For the PCM-3753I, bit 4 and bit 5 of Base+16 determines the interrupt source of port C0, bit 4 and bit 5 of Base+17 determines the interrupt source for port C1, and so forth. -
Page 27: Interrupt Triggering Edge Control
3.3.5 Interrupt Triggering Edge Control The interrupt can be triggered by a rising edge or a falling edge of the interrupt signal, selectable by the value written in the “triggering edge control” bit in the interrupt control register, as shown in following table. Table 3.4: Triggering edge control bit values En (n = 0 ~ 3) Triggering edge of interrupt signal... -
Page 28: Pattern Match Interrupt Function
Example 3.1 Assume that the pattern match function for the I/O channels PA01, PA02, PA06 and PA07 of the PCM-3753I is enabled (i.e. PA00, PA03, PA04 and PA05 on the PCM-3753I and port A0 on the PCM-3753IE are ignored during the pattern match monitoring process). -
Page 29: Change Of State Interrupt Function
(i.e. the signals in PB00, PB03, PB04 and PB05 on the PCM- 3753IE and port B0 of the PCM-3753I are ignored during the change of state process). When a change of state occurs in either PB01 or PB02 or PB06 or PB07, an interrupt signal will be delivered to the system. - Page 30 PCM-3753I User Manual...