Advantech PCL-720 User Manual
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Advantech PCL-720 User Manual

Advantech PCL-720 User Manual

Digital i/o and counter card
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Summary of Contents for Advantech PCL-720

  • Page 1 (217) 352-9330 | Click HERE Find the Advantech PCL-720 at our website:...
  • Page 2 Model PCL-720 Digital I/O & Counter Card Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...
  • Page 3 PCL-720 Digital I/O and Counter Card USER'S MANUAL This documentation is copyrighted 1990 by Advantech Co., Ltd. All rights are reserved. Advantech Co., Ltd. Reserves the right to make improvements in the products described in this manual at any time without notice.

  • Page 4: Table Of Contents

    TABLE OF CONTENTS CHAPTER 1 GENERAL INFORMATION ..... . . 1 1.1. Introduction ........1 1.2.

  • Page 5: Chapter 1 General Information

    CHAPTER 1 GENERAL INFORMATION 1.1. Introduction The PCL-720 Digital I/O and Counter Card is a PC add-on card that offers you 32 digital input channels , 32 digital output channels and 3 counter/timer channels. All digital input and output channels are TTL/DTL compatible.
  • Page 6 General Information PCL-720 Ÿ Low input loading Ÿ 3-channel programmable interval timer Ÿ On-board crystal based clock source Ÿ Breadboard area for customized circuits Applications Ÿ Industrial ON/OFF control Ÿ Contact closure monitoring Ÿ Switch panel status sense Ÿ BCD interface Ÿ...
  • Page 7 PCL-720 General Information Ÿ Breadboard Area: 540 (30 X 18) plated-through "donuts" holes, each with a.036' hole on 0.10" centers. Ÿ Digital Input Input Low Level : Min. -0.5V, max. 0.8V Input High Level: Min. 2.0V, max. 5.0V Input Loading : Max 0.2 mA at 0.4V...

  • Page 8: Chapter 2 Installation

    I/O port address space of the 8088 or 80286 microcomputer. The I/O port base address for the PCL-720 is selectable by the setting of a DIP switch (SW1). Valid addresses are from hex 200 to hex 3F8. Refer to Figure 2.1 for the location of the DIP switch (SW1).
  • Page 9 Installation PCL-720 Figure 2.1 The PCL-720 Card The required switch settings for various base addresses are illustrated as below : Note : - ON=0, OFF=1 - "X" means "don't care" - 1..8 are switch positions - A3..A8 correspond to address Lines of the PC bus. A9 is hard-wired to be 1.

  • Page 10: Clock Frequency Setting

    --------------------------------------------- 2.3. Clock Frequency Setting The PCL-720 offers on-board clock sources those are 1 MHz, 100 KHz and 10 KHz when a jumper is placed on the position marked " xl" of JP1. These frequencies can be double, half or quartered by placing a jumper on position "x2", "x1/2"...
  • Page 11 The PCL-720 is configured at the factory for the IBM PC, PC/XT, PC/AT and ah IBM PC compatibles. If you need further changes to the configuration please refer to Chapter 2.

  • Page 12: Chapter 3 Signal Connection

    CHAPTER 3 SIGNAL CONNECTION 3.1. Connector Pin Assignment The PCL-720 card is equipped with two 20-pin insulation displacement (mass termination) connectors accessible from the rear plate and three other 20-pin insulation displacement connectors on board. All these connectors can be connected to flat cables of the same type.
  • Page 13 Signal Connection PCL-720 Connector 2: Connector 3: Connector 4: Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...

  • Page 14: Timer/Counter Signal Pads

    PCL-720 Signal Connection Connector 5: 3.2. Timer/Counter Signal Pads To make the wiring of the 8253 counter input and output signals easier for user's application, all the “CLK”, “GATE” and “OUT” signals of the three 16 bit counters have their soldering pads. These pads have exactly the same signals as those on connector CN5.

  • Page 15: Strobe Of Digital Input

    Signal Connection PCL-720 position 'xl' of the JP1. 3.4. Strobe of Digital Input The digital input connectors, CN2 and CN4, have "STROBE" signals at pin-20. The "STROBE" input signals are used to gate the digital input signal DI0 to DI15 and DI16 to DI31.

  • Page 16: Chapter 4 Programming

    CHAPTER 4 PROGRAMMING 4.1. Register Structure and Format The most important issue in programming the PCL720 is understanding the meaning of the 8 registers addressable from the selected I/O port base address. The following diagram shows the relative location of each register as to the base address and its usage.

  • Page 17: Digital Uo Programming

    Section 4.3.2. 4.2. Digital I/O Programming On the PCL-720 card, 32 digital input channels and 32 digital output channels are provided. Four I/O port addresses (started from BASE +0) are reserved for accessing these channels.

  • Page 18: Programmable Interval Timer

    4.3. Programmable Interval Timer 4.3.1. The Intel 8253 The Intel 8253 Programmable interval timer is used on the PCL-720 card. It is organized as 3 independent 16-bit counters, each with a count rate of up to 2.6 MHz. Each counter can be programmed to have a count from 0 up to 65,535.

  • Page 19: The Control Byte

    Programming PCL-720 4.3.2. The Control Byte The 8253 programmable interval counter occupies 4 UO address locations in the PCL-720 VO address map as mentioned in Section 4.1. Their addresses are: Address Register Type Description ------- ---------- ---------------- BASE+4 Read/write Counter 0...

  • Page 20: Mode Definitions

    PCL-720 Programming The Counter latch command is used to read back the value of a counter without disturbing the count in progress. M2-0 : Select the operating mode M0 Mode --- --- --- ---- See Section 4.3.3. for the definition of each mode.
  • Page 21 Programming PCL-720 low and the counter will count. When terminal count is reached, the output will go high and remain high until the selected counter is reloaded with the mode or a new count is loaded. The counter continues to decrement after terminal count has been reached.
  • Page 22 PCL-720 Programming Mode 3 : Square Wave Rate Generator Similar to mode 2, except that the output will remain high until one half the count has been completed (for even numbers) and go low for the other half of the count. This is accomplished by decrementing the counter by two on the falling edge of each clock pulse.

  • Page 23: Loading And Reading The Counters

    Programming PCL-720 4.3.4. Loading and Reading The Counters The programming procedure for the 8253 is very flexible. Only two conventions need to be remembered : For each Counter, the Control Byte must be written before the initial count is written.
  • Page 24 PCL-720 Programming 150 MSB%=INT(X%/256) 'figure out the MSB 160 LSB%=X%-(256tMSB$) 'figure out the LSB 170 OUT BASE%+5,LSB% 'load Counter 1 LSB 180 OUT BASE%+5,MSB% 'MSB 190 OUT BASE&+6,LSB% 'load Counter 2 LSB 200 OUT BASE%+6,MSB% 'MSB It is often desirable to read the value of a Counter without disturbing the count in progress.
  • Page 25 Programming PCL-720 100 'read the LSB and MSB 110 c =INP(PORT%)+INP(PORT%)*256 120 IF C<CNT% GOTO 90 130 'print lapsed time and frequency 140 T=TIMER-T1 150 PRINT T,CNT%/T Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...

  • Page 26: Appendix A I/O Portaddress Map

    APPENDIX A I/O PORT ADDRESS MAP I/O Uaddress Uses range (Hex) ----------------------------------------------------------- 000-1FF Used by base system board Not used Game control 202-277 Not used 278-27F Second printer port 280-2F7 Not used 2F8-2FF COM2: 300-377 Not used 378-37F Printer port 380-3AF Not used 3B0-3BF...

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