Clock Control; Clock Type; The Initial Value By A Reset Operation - Toshiba TXZ+ Series Reference Manual

1.2. Clock control

1.2.1. Clock type

This section shows a list of clocks.
EHCLKIN: The clock input from the external.
f : A clock generated in the internal oscillation circuit or input from the X1 and X2 pins
OSC
f : A clock multiplied by PLL
PLL
fc: A clock selected by [CGPLL0SEL]<PLL0SEL> (high speed clock)
fs: A clock output from an external low speed oscillator
fsys: A system clock selected by [CGSYSCR]<GEAR[2:0]>
ΦT0:
A clock selected by [CGSYSCR]<PRCK[3:0]> (prescaler clock)
f : A clock generated with the internal high speed oscillator 1
IHOSC1
f : A clock generated with the internal high speed oscillator 2
IHOSC2
ADCLK: A conversion clock for AD converter
TRCLKIN: A clock for tracing facilities of a debugging circuit (Trace/SWV)

1.2.2. The initial value by a reset operation

A clock setting is initialized to the following states by a reset operation.
External high speed oscillator:
Internal high speed oscillator 1:
Internal high speed oscillator 2:
External low speed oscillator:
PLL (multiplying circuit):
Gear clock:
Stop
Oscillation
Stop
Stop
Stop
fc (no frequency dividing)
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TMPM3H Group(1)
Clock Control and Operation Mode
TXZ+ Family
2022-05-10
Rev. 1.3