Change Of The Pll Multiplication Value Under Operation; Pll Operation Start/Stop/Switching Procedure - Toshiba TXZ+ Series Reference Manual

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1.2.5.3. Change of the PLL multiplication value under operation

It changes to a setup which sets "0" to [CGPLL0SEL]<PLL0SEL> first, and does not use a PLL multiplication
clock during PLL multiplication clock operation when changing a multiplication value. And [CGPLL0SEL]
<PLL0ST> = 0 is read, after checking having changed to a setup which does not use a multiplication clock,
[CGPLL0SEL]<PLL0ON> is set to "0", and PLL is stopped.
Then, the multiplication value of [CGPLL0SEL]<PLL0SET> is changed, as reset time of PLL, after about 100μs
progress, [CGPLL0SEL]<PLL0ON> is set to "1", and operation of PLL is started.
Then, [CGPLL0SEL]<PLL0SEL> is set to "1" after lock up time (about 400μs) has elapsed.
Finally, [CGPLL0SEL]<PLL0ST> is read and it checks having changed.

1.2.5.4. PLL operation start/stop/switching procedure

(1) fc setup (PLL stop → PLL start)
As an fc setup, the example of switching procedure from the PLL stop state to the PLL operation state is as
follows.
[CGPLL0SEL]<PLL0ON> = 0
[CGPLL0SEL]<PLL0SEL> = 0
[CGPLL0SEL]<PLL0ST> = 0
1
[CGPLL0SEL]<PLL0SET> = 0xX
2
Wait 100µs or more
3
[CGPLL0SEL]<PLL0ON> = 1
4
Wait 400µs or more
5
[CGPLL0SEL]<PLL0SEL> = 1
6
Read [CGPLL0SEL]<PLL0ST>
Note: 1 to 4 is unnecessary when the state before switching is [CGPLL0SEL]<PLL0ON> = 1. When changing
from the state where the PLL Output clock was stabilized, it can change to the conduct PLL state by
execution of only 5 and 6.
(2) fc setup (PLL operation → PLL stop)
As an fc setup, the example of switching procedure from the PLL operation state to a PLL stop state is as
follows.
[CGPLL0SEL]<PLL0ON> = 1
[CGPLL0SEL]<PLL0SEL> = 1
[CGPLL0SEL]<PLL0ST> = 1
1
[CGPLL0SEL]<PLL0SEL> = 0
2
[CGPLL0SEL]<PLL0ST> , it read.
[CGPLL0SEL]<PLL0ON> = 0
3
<<The state before switching>>
Stops the PLL operation for fsys.
Selects the setting of the PLL for fsys to "PLL is unused (f
Indicates the status of the PLL for fsys to "PLL is unused (f
<<The example of switching procedure>>
A PLL multiplication value setup is chosen.
Latency time after a multiplication setup
PLL operation for fsys is carried out to an oscillation.
PLL output clock stable latency time
PLL selection for fsys is carried out to PLL use (f
It waits until the PLL selection status for fsys becomes "PLL use (f
(= 1)".
<<The state before switching>>
Sets the PLL oscillation for fsys.
Selects the PLL for fsys to "PLL is used (f
Indicates the status of the PLL for fsys to "PLL is used (f
<<The example of switching procedure>>
Selects the PLL for fsys to "PLL is unused (f
Waits until the status of the PLL for fsys becomes "PLL is unused
(f
) (= 0)".
OSC
Sets the PLL operation for fsys to stop.
17 / 72
TMPM3H Group(1)
Clock Control and Operation Mode
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PLL
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PLL
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OSC
TXZ+ Family
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OSC
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OSC
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PLL
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PLL
2022-05-10
Rev. 1.3

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