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Chapter 1 Overview
22
Option
1-6 Option
1-6-1 ROM Option
The product equipped with this LSI or an EPROM with this LSI controls the oscillation
mode after resetting as well as the runaway-detection watchdog timer, using bits 2 to
0 of the last address of the built-in ROM.
Option bits
7
6
5
4
PKG
−
−
−
SEL2
SEL1
Figure 1-6 ROM Option ( Address:X'7FFF' )
3
2
1
0
PKG
WDSEL2
WDSEL1
NSSTRT
Selection of oscillation mode
NSSTRT
after resetting
SLOW mode
0
NORMAL mode
1
WDSEL2
Watchdog timer cycle setting
WDSEL1
16
0
fs/2
0
1
18
fs/2
20
1
Ｘ
fs/2
Packages
PKGSEL2
PKGSEL1
Ｘ
SDIP042-P-0600
0
0
QFP044-P-1010
1
1
QFH048-P-0707
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