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Chapter 4 Timer Functions
7
6
TM5MD
TM5CLRS
TM5IR2
88
Timer Function Control Registers
(4) Timer 5 mode register (TM5MD)
5
4
3
2
TM5IR1
TM5IR0
TM5CK3
TM5CK2
Figure 4-9-16 Timer 5 Mode Register (TM5MD: X'03F88', R/W)
1
0
(at reset: 0XXXXXX0)
TM5CK1
TM5CK0
TM5CK0
0
1
TM5CK3
X
0
1
TM5IR2
0
1
TM5CLRS
0
1
If TM5CLRS=0, TM5IRQ is disabled.
Time base timer
clock source selection
fosc
(Use Prohibited) fx *
* 48QFH package only
Timer 5 clock source selection
TM5CK2
TM5CK1
0
fosc
0
1
fs/4
0
(Use Prohibited)
Output of time base timer
1
1
(Use Prohibited)
0
1
Synchronous time base timer output
Time base timer
TM5IR1
TM5IR0
interrupt period selection
0
1/2
7
of the clock source
0
1
8
1/2
of the clock source
1/2
9
of the clock source
0
1
10
1/2
of the clock source
1
1/2
13
of the clock source
x
x
Binary counter 5
clear selection flag
Enable initialization of
TM5BC during a write to TM5OC
Disable initialization of
TM5BC during a write to TM5OC
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