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DIGITAL-LOGIC AG
PCCP5 Manual V2.3
4.11.11.2
of the SAA7111A VideoInput Processor
Operation
The SECAM-processing contains the following blocks:
Baseband 'bell' filters to reconstruct the amplitude and phase equalized 0 and 90??FM-signals
Phase demodulator and differentiator (FM-demodulation)
Pe-emphasis filter to compensate the pre-emphasised input signal, including frequency offset compensation
(DB or DR white carrier values are subtracted from the signal, controlled by the SECAM-switch signal).
The burst processing block provides the feedback loop of the chroma PLL and contains;
Burst gate accumulator
Colour identification and killer
Comparison nominal/actual burst amplitude (PAL/NTSC standards only)
Loop filter chrominance gain control (PAL/NTSC standards only)
Loop filter chrominance PLL (only active for PAL/NTSC standards)
PAL/SECAM sequence detection, H/2-switch generation
Increment generation for DTO1 with divider to generate stable subcarrier for non-standard signals.
The chrominance comb filter block eliminates crosstalk between the chrominance channels in accordance with the
PAL standard requirements. For NTSC colour standards the chrominance comb filter can be used to eliminate
crosstalk from luminance to chrominance (cross-colour) for vertical structures. The comb filter can be switched off
if desired. The embedded line delay is also used for SECAM recombination (cross-over switches).
The resulting signals are fed to the variable Y-delay compensation, RGB matrix, dithering circuit and output
interface, which contains the VPO output formatter and the output control logic.
Luminance processing
The 8-bit luminance signal, a digital CVBS format or a luminance format (S-VHS, HI8), is fed through a
switchable prefilter. High frequency components are emphasized to compensate for loss. The following
chrominance trap filter (f0 = 4.43 or 3.58 MHz centre frequency selectable) eliminates most of the colour carrier
signal, therefore, it must be bypassed for S-video (S-VHS and HI8) signals. The high frequency components of the lum i-
nance signal can be peaked (control for sharpness improvement via I2C-bus) in two band-pass filters with selectable
transfer characteristic. This signal is then added to the original (unpeaked) signal. A switchable amplifier achieves
common DC amplification, because the DC gains are different in both chrominance trap modes. The improved
luminance signal is fed to the BCS control located in the chrominance processing block.
RGB matrix
Y, Cr and Cb data are converted after interpolation into RGB data in accordance with CCIR-601
recommendations. The realized matrix equations consider the digital quantization:
R = Y + 1.371 Cr
G = Y 0.336 Cb 0.698 Cr
B = Y + 1.732 Cb.
After dithering (noise shaping) the RGB data is fed to the output interface within the VPO-bus output formatter.
VBI-data bypass
For a 27 MHz VBI-data bypass the offset binary CVBS signal is upsampled behind the ADCs. Upsampling of the
CVBS signal from 13.5 to 27 MHz is possible, because the ADCs deliver high performance at 13.5 MHz sample clock.
Suppressing of the back folded CVBS frequency components after upsampling is achieved by an
interpolation filter. The TUF block on the digital top level performs the upsampling and interpolation for the bypassed
CVBS signal.
VPO-bus (digital outputs)
The 16-bit VPO-bus transfers digital data from the output interfaces to a feature box or a field memory, a digital
colour space converter (SAA7192 DCSC), a video enhancement and digital-to-analog processor
(SAA7165 VEDA2) or a colour graphics board (Targa-format) as a graphical user interface.
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