Registers; Table 7: Sh3000 Microbuddy™ Registers 0X00 To 0X0F - Semtech SH3000 User Manual

Table of Contents

Advertisement

9. Registers

NAME
0x00
PeriodMSB
0x01
Period2
0x02
Period1
0x03
PeriodLSB
0x04
TimerMSB
0x05
Timer2
0x06
Timer1
0x07
TimerLSB
0x08
RTCdaysMSB
0x09
RTCdaysLSB
RTChours
0x0A
0x0B
RTCminutes
0x0C
RTCseconds
RTCsubseconds P W
0x0D
0x0E
Config
0x0F
FLLcontrol
SH3000UM version 0.95
Copyright ©2002 Semtech Corporation
Table 7: SH3000 MicroBuddy™ Registers 0x00 to 0x0F
Timer, RTC, Configuration, and Control Registers
RESET
RESET
EVENT
VALUE
W B 0x00
P
Periodic Interrupt / Wake-up Timer setting.
W B 0x00
P
With 32.768 kHz clock the period = (32-bit value)/32768.
When the value = 0, the Timer is disabled. The whole 32-bit value
W B 0x00
P
is loaded into timer logic when PeriodLSB is written.
W B 0x00
P
W B 0x00
P
Free-running counter. This counter is reset when the PeriodLSB
W B 0x00
P
is written (Timer started) or the value of the counter is equal to 32-
bit Period value (Interrupt / Wake-up generated). The whole 32-bit
W B 0x00
P
Timer value is loaded into Timer registers when TimerLSB is read.
W B 0x00
P
P W
0x00
16-bit binary value, 0x0000 to 0xFFFF
(0 to 65535, ~ 179.5 years).
P W
0x00
W
P
0x00
BCD value, 0 to 23.
P W
0x00
BCD value, 0 to 59.
P W
0x00
BCD value, 0 to 59.
0x00
8-bit binary value, 0 to 0xFF (0 to 255)
P
1
b7
XTALtune Rewrite-Once Enable (see notes for use)
P W B
0 b6 Register Page for R0x10 through R0x17. 0 =Page0, 1 =Page1.
P W B
0 b5 ForceDCOon. Forces HF Oscillator to run under all conditions.
P W B
0 b4 CLK
0x88
P W B
1 b3 CLK
P W B
0 b2 WdogClkSelect. 1 = CLK
P W B
0 b1 Interrupt Flag Clear. 1 = clear, 0 = no effect, always reads 0.
P W B
0 b0 Interrupt Enable. 1 = enable, 0 = disable.
b7 Reserved, not used
-0-
b6 Reserved, not used
-0-
b5 Reserved, not used
-0-
0x00
b4 Reserved, not used
-0-
or
b3 Reserved, not used
-0-
0x01
P W B
0
b2 Start FLL fine frequency lock (~5 ms to achieve lock).
P W B
0
b1 Start FLL coarse frequency lock (~25 ms to achieve lock).
P W B
0/1 b0 Enable FLL. 1 = enabled, 0 = disabled. On Reset =pin CLK
2002-08
DESCRIPTION
source. 1 = 32 kHz, 0 = HFCLK.
OUT
Enable. 1 = enable, 0 = disable.
OUT
, 0 = 32 kHz.
OUT
SH3000 User Manual
Preliminary
When RTCsubseconds is
read, all RTC registers are
updated.
When RTCsubseconds is
written,
he whole RTC
t
counter chain is loaded.
SEL
34
.

Advertisement

Table of Contents
loading

Table of Contents