Serial Interface; Serial Communications Interface - Semtech SH3000 User Manual

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7. Serial Interface

7.1 Serial Communications Interface

The SH3000 and the host microcontroller communicate using a single wire, bi-directional asynchronous
serial interface. The bit rate is automatically determined by the SH3000. The SH3000 contains 36
addressable registers located at 0x00–0x1F; see the Registers chapter of this manual. Some of these
registers are accessed through a page operation. Pin 14, IO/I
and interrupt output pin. This pin is internally weakly pulled to the opposite of the programmed interrupt
polarity. For example, if interrupt is programmed to be active low, this pin is weakly pulled to V
inactive.
As shown in Figure 8, the SH3000 and the host communicate with serial data streams. The host always
initiates communication. A data stream consists of the following (in this order):
·
3-bit start field
·
3-bit read/write code
·
5-bit address field
·
1 guard bit
·
8-bit data field
·
2 parity bits
Plus, for write streams only:
·
1 guard bit
·
2 acknowledge (ACK) bits
The 3-bit start field (1,0,1 or 0,1,0, depending on interrupt polarity) uses the middle bit to determine the bit
period of the serial data stream.
The 3-bit read/write code consists of 1,1,0 for a read, or 0,1,1 for a write. This protects against early
glitches hat might otherwise put the interface into an invalid read or write access mode.
The 5-bit address field contains the address of the register.
A single guard bit gives the interface a safe period in which to change data direction. The value of a guard
bit does not matter.
The 8-bit data field is written to (read from) the register.
Two parity bits: The first parity bit is high when there are an odd number of bits in the read/write, address
and data fields; the second parity bit is the inverse of the first.
For write streams only, a guard bit is appended to the stream (to allow safe turnaround), and then two
acknowledge bits, which are a direct copy of the parity bits, are driven back to the host to indicate a
successful write access.
Two guard bits are appended to the end of the access stream (read or write). The host can not start the
next access before receiving these bits.
SH3000UM version 0.95
Copyright ©2002 Semtech Corporation
2002-08
SH3000 User Manual
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