Periodic Interrupt/Wake-Up Timer Registers - Semtech SH3000 User Manual

6.1 Periodic Interrupt/Wake-up Timer Registers

NAME
0x00 PeriodMSB
0x01 Period2
0x02 Period1
0x03 PeriodLSB
0x04 TimerMSB
0x05 Timer2
0x06 Timer1
0x07 TimerLSB
0x0E
Config
NAME
0x1A
Status
SH3000UM version 0.95
Copyright ©2002 Semtech Corporation
RESET RESET
EVENT VALUE
P
W B 0x00
Periodic Interrupt / Wake-up Timer setting.
P
W B 0x00
With 32.768 kHz clock the period = (32-bit value)/32768.
When the value = 0, the Timer is disabled. The whole 32-bit value
P
W B 0x00
is loaded into timer logic when PeriodLSB is written.
P
W B 0x00
P
W B 0x00
Free-running counter. This counter is reset when the PeriodLSB
P W B 0x00
is written (Timer started) or the value of the counter is equal to 32-
bit Period value (Interrupt / Wake-up generated). The whole 32-bit
P W B 0x00
Timer value is loaded into Timer registers when TimerLSB is read.
P W B 0x00
P 1 b7 XTALtune Rewrite-Once Enable (see notes for use)
P W B
0 b6 Register Page for R0x10 through R0x17. 0 =Page0, 1 =Page1.
P W B 0 b5 ForceDCOon. Forces HF Oscillator to run under all conditions.
P W B
0 b4 CLK
0x88
P W B 1 b3 CLK
P W B 0 b2 WdogClkSelect. 1 = CLK
P W B 0 b1 Interrupt Flag Clear. 1 = clear, 0 = no effect, always reads 0.
P W B 0 b0 Interrupt Enable. 1 = enable, 0 = disable.
RESET RESET
EVENT VALUE
P W B 0 b7 Xtal oscillator is stable
b6
-0-
b5
-0-
P W B 0 b4 Auto CLK shut-down mode (transitions on CLK
0x00
P W B 0 b3 Backup battery low.
P W B
0 b2 Serial I/O parity error.
P W B 0 b1 Interrupt status (1 = pending, 0 = idle).
P W B 0 b0 FLL locked (1 = locked, 0 = unlocked).
2002-08
DESCRIPTION
source. 1 = 32 kHz, 0 = HFCLK.
OUT
Enable. 1 = enable, 0 = disable.
OUT
, 0 = 32 kHz.
OUT
DESCRIPTION
Reserved, not used
SH3000 User Manual
Preliminary
detected).
IN
24