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Artesyn MVME8100 Manual

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MVME8100/MVME8105/MVME8110
Installation and Use
P/N: 6806800P25L
May, 2016

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Summary of Contents for Artesyn MVME8100

  • Page 1 MVME8100/MVME8105/MVME8110 Installation and Use P/N: 6806800P25L May, 2016...
  • Page 2 Artesyn reserves the right to revise this document and to make changes from time to time in the content hereof without obligation of Artesyn to notify any person of such revision or changes.

  • Page 3: Table Of Contents

    3.1.1 External Connectors ............62 MVME8100/MVME8105/MVME8110 Installation and Use (6806800P25L)
  • Page 4 4.13 PMC/XMC Sites ..............97 MVME8100/MVME8105/MVME8110 Installation and Use (6806800P25L)
  • Page 5 5.2.5 Booting VxWorks Through the Network........112 MVME8100/MVME8105/MVME8110 Specific U-Boot Commands ..... . . 113 Updating U-Boot .
  • Page 6 Related Documentation ............. . 119 Artesyn Embedded Technologies - Embedded Computing Documentation ....119 Related Specifications .
  • Page 7 VXS P0 Connector (applicable to MVME8100 only) ....... . .
  • Page 8 List of Tables MVME8100/MVME8105/MVME8110 Installation and Use (6806800P25L)
  • Page 9 Block Diagram of MVME8100 ........
  • Page 10 List of Figures MVME8100/MVME8105/MVME8110 Installation and Use (6806800P25L)

  • Page 11: About This Manual

    MVME8100/MVME8105/MVME8110. Additionally, this manual provides specific preparation and installation information and data applicable to the board. The MVME8100 is a high-performance, dual core processor board featuring the Freescale QorIQ P5020 processor. The MVME8105 is a high-performance, dual core processor board featuring the Freescale QorIQ P5020 processor.
  • Page 12 Initial Hardware Watchdog JTAG Joint Test Access Group Local Bus Controller MRAM Magnetoresistive random-access memory OSWD OS Watchdog PCIE Peripheral Component Interconnect Express PCI-X Peripheral Component Interconnect -X Programmable Interrupt Controller PCI Mezzanine Card Input/Output Module MVME8100/MVME8105/MVME8110 Installation and Use (6806800P25L)
  • Page 13 Static Random Access Memory SRIO Serial Rapid IO TSEC Three-Speed Ethernet Controller 2eSST Two edge Source Synchronous Transfer UART Universal Asynchronous Receiver/Transmitter VITA VMEbus International Trade Association VMEbus (Versa Module Eurocard) Vital Product Data PCI Express Mezzanine Card MVME8100/MVME8105/MVME8110 Installation and Use (6806800P25L)
  • Page 14 Repeated item for example node 1, node 2, ..., node Omission of information from example/command that is not necessary at the time being. Ranges, for example: 0..4 means one of the integers 0,1,2,3, and 4 (used in registers). Logical OR. MVME8100/MVME8105/MVME8110 Installation and Use (6806800P25L)
  • Page 15 Indicates a property damage message. No danger encountered. Pay attention to important information. Summary of Changes This is the first edition of the MVME8100/MVME8105/MVME8110 Single Board Computer Installation and Use. Part Number Publication Date Description...
  • Page 16 51, Figure 2-4 on page 53, Figure 3-2 on page 60, Interrupt Controller Assignments on page 105 and GPIO Electrical Characteristics on page 106. 6806800P25C December 2012 Updated Standard Compliances on page 34 6806800P25B November 2012 GA release 6806800P25A May 2012 First edition MVME8100/MVME8105/MVME8110 Installation and Use (6806800P25L)

  • Page 17: Safety Notes

    Failure to comply with these precautions or with specific warnings elsewhere in this manual could result in personal injury or damage to the equipment. Artesyn Embedded Technologies intends to provide all necessary information to install and handle the product in this manual. Because of the complexity of this product and its various uses, we do not guarantee that the given information is complete.
  • Page 18 Changes or modifications not expressly approved by Artesyn Embedded Technologies could void the user's authority to operate the equipment. Board products are tested in a representative system to show compliance with the above mentioned requirements.
  • Page 19 Verify that the length of an electric cable connected to a TPE bushing does not exceed 100  meters. Make sure the TPE bushing of the system is connected only to safety extra low voltage  circuits (SELV circuits). If in doubt, ask your system administrator. MVME8100/MVME8105/MVME8110 Installation and Use (6806800P25L)
  • Page 20 When exchanging the on-board lithium battery, make sure that the new and the old battery are exactly the same battery models. If the respective battery model is not available, contact your local Artesyn Embedded Technologies sales representative for the availability of alternative, officially approved battery models.

  • Page 21: Sicherheitshinweise

    Installieren Sie keine Ersatzteile oder führen Sie keine unerlaubten Veränderungen am Produkt durch, sonst verfällt die Garantie. Wenden Sie sich für Wartung oder Reparatur bitte an die für Sie zuständige Geschäftsstelle von Artesyn Embedded Technologies. So stellen Sie sicher, dass alle sicherheitsrelevanten Aspekte beachtet werden.
  • Page 22 Sicherheitshinweise Das Produkt wurde in einem Artesyn Embedded Technologies Standardsystem getestet. Es erfüllt die für digitale Geräte der Klasse A gültigen Grenzwerte in einem solchen System gemäß den FCC-Richtlinien Abschnitt 15 bzw. EN 55022 Klasse A. Diese Grenzwerte sollen einen angemessenen Schutz vor Störstrahlung beim Betrieb des Produktes in Gewerbe- sowie...
  • Page 23 Sie, dass das Face Plate oder die Platine deformiert oder zerstört wird. Beschädigung des Produktes und von Zusatzmodulen Fehlerhafte Installation von Zusatzmodulen, kann zur Beschädigung des Produktes und der Zusatzmodule führen. Lesen Sie daher vor der Installation von Zusatzmodulen die zugehörige Dokumentation. MVME8100/MVME8105/MVME8110 Installation and Use (6806800P25L)
  • Page 24 Verwenden Sie deshalb nur den Batterietyp, der auch bereits eingesetzt wurde und befolgen Sie die Installationsanleitung. Datenverlust Wenn Sie die Batterie austauschen, können die Zeiteinstellungen verloren gehen. Eine Backupversorgung verhindert den Datenverlust während des Austauschs. Wenn Sie die Batterie schnell austauschen, bleiben die Zeiteinstellungen möglicherweise erhalten. MVME8100/MVME8105/MVME8110 Installation and Use (6806800P25L)
  • Page 25 Batteriehalter beschädigt werden. Um Schäden zu vermeiden, sollten Sie keinen Schraubendreher zum Ausbau der Batterie verwenden. Umweltschutz Entsorgen Sie alte Batterien und/oder Blades/Systemkomponenten/RTMs stets gemäß der in Ihrem Land gültigen Gesetzgebung, wenn möglich immer umweltfreundlich. MVME8100/MVME8105/MVME8110 Installation and Use (6806800P25L)
  • Page 26 Sicherheitshinweise MVME8100/MVME8105/MVME8110 Installation and Use (6806800P25L)

  • Page 27: Introduction

    VMEbus International Trade Association (VITA) standards VMEbus, 2eSST, and PCI-X. The MVME8105 is a dual core non-VXS version of the MVME8100 board based on Freescale P5020 QorIQ processor. It runs at 2.0 Ghz with 4 GB DDR3. The MVME8105 can accommodate two PCI Mezzanine Card/ PCI Express Mezzanine Card (PMC/XMC).
  • Page 28 One 4X Port to PMC/XMC Site 2 SRIO: Two 4X Ports to VXS backplane P0 (muxed with PCIe ports)   – One USB 2.0 for front panel I/O – Two USBs 2.0 for backplane RTM I/O MVME8100/MVME8105/MVME8110 Installation and Use (6806800P25L)
  • Page 29 Support heat frame on both sides for Conduction cooled board Miscellaneous  – One front panel RESET Switch – LED front panel status indicators: four user/fail/ready LEDs – Planar status indicators – Boundary scan support MVME8100/MVME8105/MVME8110 Installation and Use (6806800P25L)
  • Page 30 Note: The front panel I/O connectors are available only in ENP1 (air cooled variants). I/O signals in ENP4 (conduction cooled) variant are accessed through P2 only. The main features of the MVME8105 are as follows: Processor (Subset of P5020 features used on MVME8100)  – Freescale QorIQ P5020 –...
  • Page 31 Two 4-channel Direct Memory Access (DMA) engines – Enhanced local bus controller (eLBC) – Two PCI Express controller/ports – Enhanced secure digital host controller (SD/MMC) – Enhance Serial Peripheral Interfaces (eSPI) – Two high-speed USB 2.0 controllers with integrated PHYs MVME8100/MVME8105/MVME8110 Installation and Use (6806800P25L)
  • Page 32 One 4X Port to PMC/XMC Site 2  – Two USBs 2.0 for backplane RTM I/ Ethernet  – Two 10/100/1000BASE-T Ethernet port to front panel – One 10/100/1000BASE-T Ethernet channels to P2 / RTM MVME8100/MVME8105/MVME8110 Installation and Use (6806800P25L)
  • Page 33 Boundary scan support The main features of the MVME8110 board are as follows: Processor (Subset of P5010 features used on MVME8110)  – Freescale QorIQ P5010,1.2Ghz, 15W TDP – One e500mc-64 core, 512kB L2 cache MVME8100/MVME8105/MVME8110 Installation and Use (6806800P25L)
  • Page 34 SM Bus  – One 512 Kbit user configuration serial EEPROM – 256B SPD EEPROMs – One 64 Kbit VPD EEPROM – RTC with battery backup – Temperature Sensors – RTM and XMC VPD EERPOMs MVME8100/MVME8105/MVME8110 Installation and Use (6806800P25L)
  • Page 35 Watchdog timer in CPU PMC/XMC: Two PMC/XMC sites with 64-bit PMCIO on Site 1  SATA SSD: Option for one 2.5 inch SATA drive (PMC/XMC Site 2)  GPIO Interface: Two GPIOs to RTM  MVME8100/MVME8105/MVME8110 Installation and Use (6806800P25L)
  • Page 36 Two 1000 BASE-BX Ethernet SERDES channels to backplane – Two USB2.0 ports to RTM with USB type A connectors on RTM panel – One SATA port to RTM with eSATA connector on RTM – Two GPIOs to planar headers on RTM MVME8100/MVME8105/MVME8110 Installation and Use (6806800P25L)

  • Page 37: Standard Compliances

    RoHS 5 of 6 due to lead solder used in the ENP4 heat frame. Mechanical Data The MVME8100 is a full 6U board with added mounting holes to support an ENP4 board variant. The MVME8100/MVME8105/MVME8110 will occupy a single VME card slot. MVME8100/MVME8105/MVME8110 Installation and Use (6806800P25L)

  • Page 38: Ordering Information

    P5020 1.8GHz 27W, 4GB DDR3, VXS, 2 PMC/XMC, ENP4 MVME8105- 01E P5020 2.0 GHz, 4GB DDR3, 2PMC/XMC, ENP1, IEEE MVME8110-01E P5010 1.2GHZ, 2GB DDR3, 2PMC/XMC, ENP1 IEEE MVME8110-01S P5010 1.2GHZ, 2GB DDR3, 2PMC/XMC, ENP1 SCANBE MVME8100/MVME8105/MVME8110 Installation and Use (6806800P25L)

  • Page 39: Board Accessories

    Model Number Description VXS1-RTM1 RTM for MVME8100 (supports ENP1 specifications only) MVME8100-HDMTKIT4 SSD Mounting kit (HDD not included) MVME8110-RTM RTM FOR THE MVME8105/MVME8110 MVME8100-HDMTKIT4-CC MVME8100 HARD DRIVE MOUNTING KIT -ENP1 AND 4-CONF COAT (HDD not included) MVME8100/MVME8105/MVME8110 Installation and Use (6806800P25L)
  • Page 40 Introduction MVME8100/MVME8105/MVME8110 Installation and Use (6806800P25L)

  • Page 41: Hardware Preparation And Installation

    Unpack the hardware. Configuring the Board on page Configure the hardware by setting jumpers on the board and RTM. 3. Install the RTM (VXS1-RTM1) of MVME8100 or MVME8110-RTM of MVME8110 in the chassis. Rear Transition Module on page 4. Install PMC module (if required).

  • Page 42: Unpacking And Inspecting The Board

    3. Remove the desiccant bag shipped together with the board and dispose of it according to your country’s legislation. The product is thoroughly inspected before shipment. If any damage occurred during transportation or any items are missing, contact customer service immediately. MVME8100/MVME8105/MVME8110 Installation and Use (6806800P25L)

  • Page 43: Requirements

    MVME8100/MVME8105/MVME8110 baseboard appears in Chapter 4, Functional Description. The MVME8100 has ENP1 and ENP4 variants which comply with the following environmental and regulatory specifications. The MVME8105 has ENP1variant only which comply with the following environmental and regulatory specifications.
  • Page 44 Note: The MVME8100 ENP 4 version includes NAND Flash memory in the form of the eMMC. The specified storage limits for the MVME8100 ENP 4 version are -55° C to +105° C. However, it should be noted that the industry...

  • Page 45: Power Requirements

    Operating load*: 65 Watts, max (@85°C card edge temperature) (ENP4) The following table shows the power limits due to the available 5 volts pins, when the MVME8100/MVME8105 is installed in either a 3-row or 5-row chassis and when PMCs/XMCs are present. Chassis Type Power Limit...

  • Page 46: Thermal Requirements

    2.2.3 Thermal Requirements The MVME8100/MVME8105/MVME8110 module requires a minimum air flow of 10 CFM uniformly distributed across the board, with the airflow traveling in the direction from PMC/XMC 1 to PMC/XMC 2, when operating at a 55° C (131° F) ambient temperature.

  • Page 47: Installing Accessories

    Hardware Preparation and Installation Prior to installing PMC modules on the MVME8100/MVME8105/MVME8110 baseboard, ensure that all switches that are user configurable are set properly. To do this, refer to Figure 2-1 or the board itself, for the location of specific switches and set the switches according to the...

  • Page 48: Rear Transition Module

    2.4.1 Rear Transition Module The RTM of MVME8100/MVME8105/MVME8110 does not support hot swap. You must remove power to the system before installing the module. Before installing the transition module, you may need to manually configure the RTM switches and install a PMC I/O Module (PIM).

  • Page 49: Pmc/Xmc Installation

    +3.3 V I/O PMC modules. The onboard PMC sites do not support +5.0 V I/O PMC modules. The MVME8100 ENP4 version only supports rugged conduction cooled PMC/XMC modules (see VITA 20-2001 for conduction cooled PMC for mechanical definition.
  • Page 50 Hardware Preparation and Installation Follow the steps to install a PMC/XMC module onto the MVME8100/MVME8105/MVME8110 board. Installation Procedure Read all notices and follow the steps to install a PMC/XMC on the baseboard. Logic Ground to Chassis Ground Isolation The MVME8100/MVME8105/MVME8110 heat frames are isolated from the board logic ground.
  • Page 51 Tighten the screws. Note: Rugged PMC/XMC modules installed on an ENP4 MVME8100 have more than four mounting screws. 7. Install the board into the appropriate card slot. Make sure that the board is well seated into the backplane connectors.

  • Page 52: Sata Installation

    2.4.3 SATA Installation A 2.5" SATA drive can be installed in PMC/XMC site 2. The MVME8100-HDMTKIT4 SATA mounting kit (6706881A01x) provides the mounting hardware. A SATA drive which meets the intended board operating environment for temperature and vibration must be used.
  • Page 53 Read all notices and follow the steps to install a SATA drive on the baseboard. Logic Ground to Chassis Ground Isolation The MVME8100/MVME8105/MVME8110 heat frames are isolated from the board logic ground. Installing a SATA drive which has a metallic case connected to the drive logic ground will result in a short between chassis ground and the MVME8100/MVME8105/MVME8110 logic ground.

  • Page 54: Figure 2-4 Sata Drive Installation

    2-4. 3. Attach SATA adapter board to SATA drive as shown in step 2 of Figure 2-4. 4. Use two screws to secure adapter to mounting brackets as shown in step 3 of Figure 2-4. MVME8100/MVME8105/MVME8110 Installation and Use (6806800P25L)

  • Page 55: Installing And Removing The Board

    This section describes the recommended procedure for installing the MVME8100/MVME8105/MVME8110 board in a chassis. The MVME8100/MVME8105/MVME8110 does not support hot swap, you must remove power to the slot or system before installing the module. Before installing the MVME8100/MVME8105/MVME8110, ensure that the serial ports and switches are properly configured.
  • Page 56 Hardware Preparation and Installation Use the following steps to install the MVME8100/MVME8105/MVME8110 into your computer chassis. 1. Wear an ESD strap to your wrist. 2. Attach the other end of the ESD strap to an electrical ground. The ESD strap must be secured to your wrist and to ground throughout the procedure.

  • Page 57: Completing The Installation

    7. Carefully remove the board from the chassis and store the board in anti-static envelope. Completing the Installation The MVME8100/MVME8105/MVME8110 is designed to operate as an application-specific compute blade or an intelligent I/O board/carrier. It can be used in any slot in a VME chassis.
  • Page 58 Hardware Preparation and Installation The console settings for the MVME8100/MVME8105/MVME8110 are: Eight bits per character  One stop bit per character  Parity disabled (no parity)  Baud rate of 9600 baud  Verify that hardware is installed and the power/peripheral cables connected are appropriate for your system configuration.

  • Page 59: Connectors, Leds, And Switches

    Connectors, LEDs, and Switches This chapter summarizes the Front Panel Connectors, LEDs, and On-Board Switches and their configuration for the MVME8100/MVME8105/MVME8110 board. The following components are found on MVME8100/MVME8105/MVME8110 front panel. Refer to Figure 3-1 for the location of each component.

  • Page 60: Figure 3-2 Enp4 Leds And Switches

    Connectors, LEDs, and Switches Figure 3-2 ENP4 LEDs and Switches MVME8100/MVME8105/MVME8110 Installation and Use (6806800P25L)

  • Page 61: Figure 3-3 Enp1 Board Connectors, Leds, Switches

    ENP1 Board Connectors, LEDs, Switches Board User LED Console Port Micro DB9 Reset Switch Board Fail LED PMC/XMC Site2 PMC/XMC Site1 Link LED Gigabit Ethernet Port1 Activity LED Link LED Gigabit Ethernet Port2 Activity LED MVME8100/MVME8105/MVME8110 Installation and Use (6806800P25L)

  • Page 62: Connectors

    Table 3-1 Console Front Panel Connector (J1) PIN No RS232 SIGNALING RS485 SIGNALING COM_0_RX COM_0_RX- COM_0_TX COM_0_TX- COM_0_RTS COM0_TX+ COM_0_CTS COM0_RX+ Table 3-2 Front Panel Tri- Speed Ethernet Connector (J4) Note: J4 is assembled only on ENP1 Pin No Signal Description MVME8100/MVME8105/MVME8110 Installation and Use (6806800P25L)
  • Page 63 Note: J4 is assembled only on ENP1 Pin No Signal Description TD0+ TD0- TD1+ TD2+ TD2- TD1- TD3+ TD3- Table 3-3 USB Connector (J6) Note: J6 is assembled only on ENP1 Pin No Signal Description Data - Data + MVME8100/MVME8105/MVME8110 Installation and Use (6806800P25L)

  • Page 64: Backplane Connectors

    SYSFAIL BGOUT3 BERR SYSRESET +3.3V (not used) LWORD WRITE AM 5 +3.3V (not used) ADD 23 DTACK AM 0 ADD 22 +3.3V (not used) AM 1 ADD 21 AM 2 ADD 20 +3.3V (not used) MVME8100/MVME8105/MVME8110 Installation and Use (6806800P25L)

  • Page 65: Table

    IRQ5 ADD 12 +3.3V (not used) ADD 4 IRQ4 ADD 11 ADD 3 IRQ3 ADD 10 +3.3V (not used) ADD 2 IRQ2 ADD 9 ADD 1 IRQ1 ADD 8 +3.3V (not used) -12V +5V_STDBY +12V MVME8100/MVME8105/MVME8110 Installation and Use (6806800P25L)

  • Page 66: P2 Connectors

    PMC IO 23 GPIO_3 PMC IO 26 PMC IO 25 I2C DATA GIGE3_MD IO3_P PMC IO 28 DATA 16 PMC IO 27 I2C CLK PMC IO 30 DATA 17 PMC IO 29 COM1_RX/ GIGE3_MD COM1_RX_ IO3_N MVME8100/MVME8105/MVME8110 Installation and Use (6806800P25L)

  • Page 67: Table

    PMC IO 46 DATA 24 PMC IO 45 COM1_TX/ GIGE4_MD COM1_TX_ IO1_N PMC IO 48 DATA 25 PMC IO 47 COM1_RTS _N/COM1_ TX_P PMC IO 50 DATA 26 PMC IO 49 COM2_TX/ GIGE4_MD COM2_TX_ IO2_P MVME8100/MVME8105/MVME8110 Installation and Use (6806800P25L)

  • Page 68: Table

    _N/COM4_ TX_P PMC IO 62 PMC IO 61 GIGE4_MD IO3_N PMC IO 64 PMC IO 63 Table 3-6 VXS P0 Connector (applicable to MVME8100 only) Row G Row F Row E Row D Row C Row B Row A P1_TX0_N...

  • Page 69: On-Board Connectors

    P2_RX2_N P2_RX2_P P2_TX3_N P2_TX3_P P2_RX3_N P2_RX3_P 3.1.2 On-Board Connectors The on-board customized SATA connector is compatible with the MVME8100 SATA kit. Following are the onboard connectors: SATA connector  PMC connector  Asset Joint Test Access Group (JTAG) connector ...

  • Page 70: Table

    +3.3V +3.3V PMC Connectors The MVME8100/MVME8105/MVME8110 supports two PMC sites. The connector is located on the middle portion of the board. It utilizes J14 to support PMC I/O that goes to RTM PMC. Table 3-8 PMC J11/J21 Connector Pin Name...
  • Page 71 REQ A AD 9 +3.3V AD 31 CBE0 AD 28 AD 6 AD 27 AD 5 AD 25 AD 4 +3.3V CBE3 AD 3 AD 22 AD 2 AD 21 AD 1 AD 19 AD 0 MVME8100/MVME8105/MVME8110 Installation and Use (6806800P25L)

  • Page 72: Table 3-9 Pmc J12/J22 Connector

    +3.3V JTAG TDI STOP PERR +3.3V SERR BUSMODE2 CBE1 (Pulled UP) +3.3V PCI RESET AD 14 BUSMODE3 AD 13 (PULLED DWN) +3.3V M66EN BUSMODE4 AD 10 (PULLED DWN) AD 8 +3.3V AD 30 AD 7 MVME8100/MVME8105/MVME8110 Installation and Use (6806800P25L)

  • Page 73: Table

    Table 3-10 PMC J13/J23 Connectors Pin Name Signal Description Pin Name Signal Description AD48 AD 47 CBE7 AD 46 CBE6 AD 45 CBE5 CBE4 +3.3V AD 44 +3.3V AD 43 PAR64 AD 42 AD 63 AD 41 MVME8100/MVME8105/MVME8110 Installation and Use (6806800P25L)

  • Page 74: Table

    AD 50 AD 49 Table 3-11 PMC J14 Connector Pin Name Signal Description Pin Name Signal Description PMC IO 1 PMC IO 33 PMC IO 2 PMC IO 34 PMC IO 3 PMC IO 35 MVME8100/MVME8105/MVME8110 Installation and Use (6806800P25L)

  • Page 75: Table

    PMC IO 26 PMC IO 58 PMC IO 27 PMC IO 59 PMC IO 28 PMC IO 60 PMC IO 29 PMC IO 61 PMC IO 30 PMC IO 62 PMC IO 31 PMC IO 63 MVME8100/MVME8105/MVME8110 Installation and Use (6806800P25L)

  • Page 76: Table 3-12 Asset Jtag Header Pin Assignment (P12)

    PMC IO 32 PMC IO 64 Asset JTAG Connector The MVME8100/MVME8105/MVME8110 contains a 20-pin 0.1" header for an Asset JTAG header. The pinout for the header is given in the following table. Table 3-12 Asset JTAG Header Pin Assignment (P12)

  • Page 77: Xmc Connectors

    Connectors, LEDs, and Switches XMC Connector MVME8100/MVME8105/MVME8110 supports two XMC sites. The board only supports J15 for XMC site 1 and J25 for XMC site 2. Table 3-13 XMC Connectors XJ1/2 (ROW A) XJ1/2 (ROW B) XJ1/2 (ROW C) XJ1/2 (ROW D)

  • Page 78: Leds

    Connectors, LEDs, and Switches LEDS Table 3-14 describes the LEDs on the front panel of the MVME8100/MVME8105/MVME8110. Refer to Figure 3-1 for LED locations. Table 3-14 Front Panel LEDs Label Function Color Description USER 1 (D16) User Defined By Default Yellow User Software Controllable.

  • Page 79: On-Board Leds

    ENP1: PS2_LED_N ENP4: POWER Green ENP1: PS3_LED_N ENP4: RESET Amber USR_LED2_N USR_LED3_N Yellow Switches The board provides the following configuration switches: S2 Switch  S3 Switch  S4 Switch  S5 Switch  Reset/Abort Switch  MVME8100/MVME8105/MVME8110 Installation and Use (6806800P25L)

  • Page 80: Configuration Switches

    ON - P2 Serial Port 2 is RS422/485 OFF - P2 Serial Port 3 is RS232 ON - P2 Serial Port 3 is RS422/485 OFF - Front Panel console Port is RS232 ON - Front Panel console Port is RS422/485 MVME8100/MVME8105/MVME8110 Installation and Use (6806800P25L)

  • Page 81: S3 Switch

    Table 3-16 S2 Switch Settings (continued) Position Default Description OFF - Select SRIO for P0 Backplane Fabric (applicable to MVME8100 only) ON - Select PCIe for P0 Backplane Fabric (applicable to MVME8100 only) 3.3.1.2 S3 Switch The TSI148 VMEbus Status Register provides the VMEbus geographical address of the MVME8100/MVME8105/MVME8110.

  • Page 82: Table 3-18 Three Row Backplane Manual Slot Addressing

    1 11011 0 11010 0 11001 1 11000 1 10111 0 10110 0 10101 1 10100 0 10011 1 10010 1 10001 0 10000 1 01111 0 01110 0 01100 1 01100 0 01011 1 01010 MVME8100/MVME8105/MVME8110 Installation and Use (6806800P25L)

  • Page 83: S4 Switch

    S4 Switch The S4 switch includes the SCON control and PCIE/SRIO P0 root complex/endpoint configuration switches for MVME8100. The S4 switch of MVME8105/MVME8110 includes SCON control only. The VME SCON AUTO switch is OFF to select Auto-SCON mode. The switch is ON to select manual SCON mode which works in conjunction with the VME SCON SEL switch.

  • Page 84: Reset /Abort Switch

    P5020 / P5010 processor. If the button is pressed for more than 3 seconds, the CPLD will generate a board hard reset. If the board is configured as System Controller, the backplane VME SYSRESET signal is also asserted during a board hard reset. MVME8100/MVME8105/MVME8110 Installation and Use (6806800P25L)

  • Page 85: Functional Description

    Chapter 4 Functional Description The MVME8100 Single Board Computer is a 6U VME/VXS board based on the Freescale QorIQ P5020 processor. The MVME8110 Single Board Computer is a 6U VME board based on the Freescale QorIQ P5010 processor. This section describes the features of MVME8100/MVME8105/MVME8110.

  • Page 86: Block Diagram

    64- bit 133MHz PCIe x4 ( NTB) PCI-X sRIO x 4 sRIO x 4 PCIe x4 ( NTB) TSI148 MUX/ MUX/ 4 Multi- Protocol DEMUX DEMUX PHY1 Transceivers P 2 RTM P1 , P 2 BP MVME8100/MVME8105/MVME8110 Installation and Use (6806800P25L)

  • Page 87: Figure 4-2 Block Diagram Of Mvme8110

    Functional Description Figure 4-2 illustrates the MVME8110 architecture. Figure 4-2 Block Diagram of MVME8110 MVME8100/MVME8105/MVME8110 Installation and Use (6806800P25L)

  • Page 88: Figure 4-3 Block Diagram Of Mvme8105

    PCIe SATA PCIe x4 CTRL Switch PCIe x4 Freescale PCIe x1 QorIQ P5020 Quad UART PCIe x2 PCIe PCI-X 64-bit 133MHz PCI-X TS1148 4 Multi- Protocol PHY1 Transceivers USB Hub P2 RTM P1, P2 BP MVME8100/MVME8105/MVME8110 Installation and Use (6806800P25L)

  • Page 89: Processor

    The MVME8100/MVME8105 board ENP1 version is designed to use the 2.0 GHz core processor version while the ENP4 version uses the 1.8 GHz processor. The MVME8110 board ENP1 version is designed to use the 1.2 GHz core processor.

  • Page 90: Real Time Clock

    4.4.1 Real Time Clock The MVME8100 implements an Real Time Clock (RTC) to maintain seconds, minutes, hours, day, date, month, and year accurately. It includes a 32.768 KHZ crystal, DS1337 RTC, and back up power. For the ENP1 version of the MVME8100/MVME8105/MVME8110, a battery is used for the RTC back up power.

  • Page 91: Initial Hardware Watchdog

    OSWD is serviced and disabled by writing 0xBBC2 to CPLD Command/Status Register. 4.4.4 CPLD Tick Timer The MVME8100 supports four independent 32-bit timers that are implemented on the CPLD to provide fully programmable registers for the timers. Ethernet Interfaces The P5020 / P5010 has five dTSEC controllers. The controllers can be configured to implement RGMII, GMII, or SGMII interfaces to external Ethernet transceivers.

  • Page 92: Spi Interface

    The P5020 / P5010 SPI device controller uses Chip Select 0 as the boot device, so CPLD logic is used on the MVME8100/MVME8105/MVME8110 in order to swap the chip select to the boot devices. The chip select control is based upon the configuration switch S5-1.

  • Page 93: Mram

    The default baud rate on the front panel serial is 9600 baud. The physical front panel console connector is a male micro-min DB-9. A male- to -male micro- mini DB9 to DB9 adapter cable is available under Artesyn Embedded Technologies Part Number SERIAL MINI-D (30-W2400E01A).

  • Page 94: Rear Uart Ports

    MVME8100/MVME8105/MVME8110 operating as a root complex or as an end point on the P0 connector ports for MVME8100. The selection of the root complex or end point eeprom for loading the configuration data after reset is determined by the root complex...

  • Page 95: Srio Ports

    SRIO ports. The SRIO switch supports multiple lane speeds including 1.25, 2.5, 3.125 and 5.0 Gbaud. The MVME8100 provides two x4 SRIO ports which may be routed to the P0 connector through a high speed mux. The selection of SRIO or PCIe ports to P0 is...

  • Page 96: Figure 4-5 Srio Bus Topology

    The board provides two separate eeproms so that separate configuration data can be maintained for the MVME8100 operating as a root complex or as an end point on the P0 ports. The selection of the root complex or end point eeprom for...

  • Page 97: Pmc/Xmc Sites

    PCIe Mux accordingly. 4.13.1 PMC Add-on Card The MVME8100/MVME8105/MVME8110 supports up to two PMC cards. PCI-X operation to each site is provided using a separate IDT TSI384 PCIe to PCI-X bridge for each site. Each Tsi384 can support up to 8.5Gbps (64bits x 133 Mhz).

  • Page 98: Xmc Add-On Card

    HDD/SDD in PMC/XMC site 2. The heat frame has mounting holes to support the 2.5" SSD/HDD on board. The connector interface to the MVME8100/MVME8105/MVME8110 board is compatible with the Artesyn Embedded Technologies SATA mounting kit MVME8100- HDMTKIT4, which contains a SATA adapter board, screws and mounting brackets. The SATA adapter board provides a standard SATA connector to support horizontal mounting of the HDD/SSD.

  • Page 99: Tsi148 Vme Controller

    6U VME card in 2eSST mode is 320MBps, or 2.62 Gbps. 4.16 USB The P5020 / P5010 provides two USB 2.0 controllers with integrated PHYs. The MVME8100 / MVME8110 routes USB port 1 to the front panel to an upright USB Type A receptacle. The DC power for the front panel USB port is supplied through Micrel's MIC2076 power switch which provides soft, current limiting, over current detection and power enable.

  • Page 100: Reset/Control Cpld

    0x57 4.18 Reset/Control CPLD The MVME8100/MVME8105/MVME8110 uses a Lattice LCMXO2280C CPLD to provide reset, power up sequencing, timers, miscellaneous board logic, and status/control registers accessible through the P5020 / P5010 LBC interface. The CPLD uses early 3.3V power from the +5V backplane and can be programmed through JTAG interface pins through the JTAG connector.

  • Page 101: Power Management

    CPLD through each regulator power good signal. If one voltage rail fails, the CPLD will disable all of the regulators and the only way to restart the board is by power cycling the chassis 5 volt power. MVME8100/MVME8105/MVME8110 Installation and Use (6806800P25L)

  • Page 102: Power Distribution Structure

    Functional Description 4.19.1 Power Distribution Structure Figure 4-7 displays the MVME8100/MVME8105/MVME8110 power distribution structure. Figure 4-7 Power Distribution +3.3V_MGT (Early Power) Lattice LCMXO 2280 C LT1963AEST -3.3# TRPBF National SCANSTA112 BACKPLANE 400mA – 1 A max +1.0V Freescale P5020 / P5010 TPS40193DRCR +5.0V...

  • Page 103: Clock Structure

    Functional Description 4.20 Clock Structure Figure 4-9 shows the clock tree implementation for the MVME8100/MVME8105/MVME8110. Figure 4-8 Clock Structure 100 Mhz Differential (HCSL) P5020 / P5010 SERDES REF1 100 Mhz Differential (HCSL) P5020 / P5010 SERDES REF2 ICS9FG104 100 Mhz Differential (HCSL)

  • Page 104: Reset Structure

    Functional Description 4.21 Reset Structure The MVME8100/MVME8105/MVME8110 reset begins after the power up sequence is completed. A board reset can also be initiated using the front panel reset switch, the RTM reset switch (through P2) or under software control through the processor Reset Request.

  • Page 105: Figure 4-9 Reset Control Diagram

    PWR_V3P3_ EN PWR_V2P5_ EN ICS 841664 PWR_V1P0_EN PWR_V1P1_EN PWR_V1P0_IDT_ EN PWR_V1P2_SW_EN CPU_ PORESET _N PWR_V1P5_S3_ EN FREESCALE CPU_ HRESET _N PWR_V1P5_S5_ EN P5020 / P5010 CPU_ RESET_ REQ_ N PWR_V3P3_ MISC_ EN BPSWITCH _N Connector MVME8100/MVME8105/MVME8110 Installation and Use (6806800P25L)

  • Page 106: Interrupt Controller Assignments

    BCM54616S INT BCM54616S PHY interrupt from LED4 pin. IRQ10/GPIO28 SRIO_IRQ_INT_L 80HCPS1616 SRIO IRQ_N pin (applicable to MVME8100 only) IRQ11/GPIO29 RTC_INT_L RTC interrupt (routed through CPLD) IRQ10/GPIO28 with interrupt source SRIO_IRQ_INT_L is applicable to MVME8100 only. MVME8100/MVME8105/MVME8110 Installation and Use (6806800P25L)

  • Page 107: Gpio Electrical Characteristics

    Functional Description 4.23 GPIO Electrical Characteristics The four GPIO signals routed to the P0 of MVME8100 and P2 connectors have the following electrical characteristics: Table 4-2 GPIO DC Electrical Characteristics Min.(V) Max.(V) Min.(V) Max.(V) Max.(V) Min.(V) (mA) (mA) -0.3 Table 4-3 GPIO Pull-Down Characteristics...

  • Page 108: Figure 4-10 Thermal Management

    However, to maintain proper CPU temperature, the recommended air flow direction is to enter the board from the CPU side, that is, the air should flow in the direction from PMC/XMC site 1 to PMC/XMC Site 2. Figure 4-10 Thermal Management MVME8100/MVME8105/MVME8110 Installation and Use (6806800P25L)

  • Page 109: Boot System

    Chapter 5 Boot System The MVME8100/MVME8105/MVME8110 uses Das U-Boot, a boot loader software based on the GNU Public License. It boots the blade and is the first software to be executed after the system is powered on. Its main functions are: Initialize the hardware ...

  • Page 110: Boot Options

    TFTP server. Configure U-Boot environment variables: setenv ipaddr <IP address of MVME8100/MVME8110> setenv serverip <IP address of TFTP server> setenv gatewayip <gateway IP> setenv netmask <netmask> setenv bootargs 'root=/dev/ram rw console=ttyS0,9600n8...

  • Page 111: Booting From An Optional Sata Drive

    # option: usb - interface, 0:1 - device 0 partition 1 fatload usb 0:1 1000000 $File_uImage fatload usb 0:1 2000000 $File_ramdisk fatload usb 0:1 f00000 $File_dtb 5. Boot the Linux in memory: bootm 1000000 2000000 f00000 MVME8100/MVME8105/MVME8110 Installation and Use (6806800P25L)

  • Page 112: Booting From Emmc

    'tftpboot $vxbootfile && setenv bootargs $vxbootargs && bootvx' setenv vxbootfile <VxWorks_image> setenv vxbootargs 'dtsec(3,0)<IP address of TFTP server>:VxWorks h=<IP address of TFTP server> e=<IP address of MVME8100/MVME8105/ MVME8110>:ffffff00 b=<unused IP> u=vxworks pw=vxworks f=0x80' saveenv MVME8100/MVME8105/MVME8110 Installation and Use (6806800P25L)

  • Page 113: Mvme8100/Mvme8105/Mvme8110 Specific U-Boot Commands

    Boot System 3. TFTP the files from the server to local memory, then boot: run vxboot MVME8100/MVME8105/MVME8110 Specific U- Boot Commands Table 5-1 MVME8100/MVME8105/MVME8110Specific U-Boot Commands Command Description Print or set address offset base Print board info structure bdinfo Boot default, i.e., run 'bootcmd' boot Boot default, i.e., run 'bootcmd'...
  • Page 114 Boot System Table 5-1 MVME8100/MVME8105/MVME8110Specific U-Boot Commands (continued) Command Description Load binary file from a DOS file system fatload List files in a directory (default /) fatls Flattened device tree utility commands Start application at address 'addr' Print online help...

  • Page 115: Updating U-Boot

    Boot System Table 5-1 MVME8100/MVME8105/MVME8110Specific U-Boot Commands (continued) Command Description Send ICMP ECHO_REQUEST to network host ping Print environment variables printenv Boot image through network using RARP/TFTP protocol rarpboot Perform RESET of the CPU reset Run commands in an environment variable...
  • Page 116 4. Write 0x90000 bytes from RAM address 0x1000000 starting at SPI address 0: sf write 0x1000000 0 0x90000 To replace the image in SPI bank 1, replace step 2 with Select SPI flash # 1: sf probe 1 MVME8100/MVME8105/MVME8110 Installation and Use (6806800P25L)

  • Page 117: Battery Exchange

    Appendix A Battery Exchange Battery Exchange The ENP1 variant contains an on-board battery. The battery location is shown in the following figure. Figure A-1 Battery Location Battery MVME8100/MVME8105/MVME8110 Installation and Use (6806800P25L)
  • Page 118 The battery provides data retention of seven years summing up all periods of actual data use. Artesyn Embedded Technologies therefore assumes that there usually is no need to exchange the battery except, for example, in case of long-term spare part handling.

  • Page 119: Table B-1 Artesyn Embedded Technologies - Embedded Computing Publications

    The publications listed below are referenced in this manual. You can obtain electronic copies of Artesyn Embedded Technologies - Embedded Computing publications by contacting your local Artesyn sales office. For released products, you can also visit our Web site for the latest copies of our product documentation.
  • Page 120 IEEE Standard Physical and Environmental Layer for PCI Mezzanine Cards: IEEE1386.1 Oct 25, 2001 Conduction cooled VME mechanics IEEE 1101.2 - 1992 Additional Mechanical Specifications IEEE 1101.10 - 1996 IEEE Standard for Mechanical Core Specifications for Microcomputers IEEE 1101.1 - 1998 MVME8100/MVME8105/MVME8110 Installation and Use (6806800P25L)

  • Page 121: Table B-3 Manufacturer's Publications

    Document Title and Source Publication Number Freescale Corporation P5020/ P5010 QorIQ Integrated Processor Hardware Specifications P5020EC P5020 QorIQ Integrated Multicore Communication Processor Reference P5020RM Manual Integrated Devices IDT 89HPES32NT24xG2 PCI Express Switch User Manual CPS-1616 User Manual MVME8100/MVME8105/MVME8110 Installation and Use (6806800P25L)
  • Page 122 Related Documentation MVME8100/MVME8105/MVME8110 Installation and Use (6806800P25L)
  • Page 124 Artesyn Embedded Technologies, Artesyn and the Artesyn Embedded Technologies logo are trademarks and service marks of Artesyn Embedded Technologies, Inc. All other product or service names are the property of their respective owners. © 2016 Artesyn Embedded Technologies, Inc.

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