Kontron AT8402 User Manual page 47

AT8402
The FUM is responsible for field upgrades, rollbacks and watchdog functions of the IPM con-
troller. Four SPI compatible memory devices are connected to the FUM which build up two IPMI
firmware banks with 512 Kbyte each. One bank contains a copy of the current IPMC code. The
other bank can be written without affecting IPMC operation. Once the bank is updated, the FUM
writes its content into the IPMC. IPMC control signals are all buffered in the CPLD so that board
operation is not affected during update. In the case of a fault during the update process, the
FUM can configure the IPMC with the old firmware that is kept in the other bank. The FUM is
also the watchdog timer for the IPMC. There are several control signals to supervise the IPM
controller.
3.1.7.3 CPLDs
The Clock CPLD implements the Synchronous Clock Distribution (see section 3.1.5) and the
Control CPLD is part of the board management. They are responsible for connecting the PPC
to the IPMC and FUM and for handling the serial interfaces of PPC, IPMC and FUM to the
RS232 connector on the front panel. The host interface between PowerPC and CPLD, realized
by PPC's External Bus Interface (EBC), is used as CPLD-Register-Interface and as communi-
cation interface to IPM controller. The EBC is configured as a demultiplexed 8 Bit Address/Data
interface. For accesses to the IPMC Controller, an EBC to LPC (Low Pin Count)-Bridge is in-
cluded as protocol interface. The LPC interface is for communication between IPMC and PPC
over KCS protocol.
The CPLD controls the LEDs for the whole board via shift registers. It handles the signals to
monitor the AMCs and the RTM and handles the signals for the line drivers for the synchroni-
zation clocks.
An internal multiplexer controls the serial interfaces from the PPC, the FUM and the IPMC. It
is possible to connect each device to the other or to the RS232 connector on the RTM.
3.1.8 RTM Interface
Management and I/O interfaces from the Base Board are routed to Zone 3 where a connector
mates with the RTM. This allows Base Boards to be quickly and reliably serviced without the
issues associated with disconnecting and reconnecting multiple cable assemblies. The RTM
connection is compliant to the PICMG 3.0 standard.
For the connection between the AT8402 and the RTM, three connectors with 40 differential
pairs are used (J30, J31 and J32).
Each AMC Bay has eight generic interconnects to the RTM Zone 3. Four SAS/SATA interfaces
for mass storage are implemented. There is a JTAG connection for CPLD update or Boundary
Scan-Test. An I²C IPMI interface is implemented for board management. The PPC405GP man-
agement interfaces (Fast Ethernet and RS232) are also connected to the RTM. Two GbE ports
allow connection to the GbE switch.
For more information on the RTM8400, refer to section 3.2.
Hardware Description
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