2776 Dsp Module; Power Supply & Supervisory Circuits; Uart And Level Shifting Circuitry - Novametrix Medical Systems MARS PO2 TECH 2001 Service Manual

2776 DSP Module

is also brought to IC1 pin 10. The level shifted output at IC1 pin 7 is unused (except for factory
test use).
The Receive (RX) line at J101 pin 2 and the Clear To Send (CTS) line at J101 pin 6 are input
signals to the Model 2001. They are level shifted by IC1 and sent across the isolation barrier by
ICs5 and 6 respectively.
The transmit signal TX0, can be configured to communicate with the Analog Output Module,
Seiko DPU414 Printer, or NovaCARD writer module. The Analog Module (Catalog Number
5963-01) which when connected to the rear panel connector, provides analog representations
of the SpO2 and Pulse Rate values, and a plethysmogram signal. The Seiko printer provides
hardcopy output of trend information for inclusion with patient records while the NovaCARD
option permits patient trend information to be stored externally on a memory card for later use.
(See the Model 2001 and NovaCARD User's Manual for more information on the printer or the
NovaCARD options.)
The transmit output TX0 from the CPU and the Receive (RX0) and Clear To Send (CTS*) inputs
to the CPU are connected to the rear panel RS232 connector.
2776 DSP Module
The 2776 DSP Module communicates serially with the main board (2775) using serial channel
1 (TX1 & RX1). The DSP processes the 20 bit data from the A/D converters on the main board
and calculates the saturation by using two specialized algorithms, and reports one of these
numbers as determined by a separate arbitrator algorithm.
Power Supply & Supervisory Circuits
See sheet 2 of 4 on schematic.
Power is brought on board the DSP module via J2 the host interface connector (J103 on the
2775 board). The +5V DC supply is filtered by L5 and is then regulated down to the 3.3V DC
and 2.5V DC supplies by IC4 and IC7 respectively. IC4 is a 3.3V low dropout regulator which
supplies the DSP I/O and it's peripheral circuitry (memory, UART, glue logic etc.) while IC7, a
2.5V low dropout regulator, supplies the DSP core. IC5 is a dual microprocessor supervisor that
monitors the state of the 3.3V and 2.5V supplies in addition to providing a power on and
watchdog reset for the DSP. IC5 will cause a reset if either supply (or both) drops below it's
predetermined threshold (sense1 and sense2). It will also hold the DSP in a reset condition on
power up once it's VDD input exceeds 1.1V and until the sense inputs are satisfied with the
supply level. After which time a 200ms timer starts and reset is held until it times out. It will also
provide a reset once the watchdog timer has been started if it is not transitioned (low to high or
high to low) at least once every 1.6 seconds. Diodes D2 and D3 insure that the DSP core is
powered up at the same time as its I/O.

UART and Level Shifting Circuitry

See sheet 2 of 2 on schematic.
The DSP (IC1) communicates to the host processor through IC6 a serial UART and IC8 a quad
buffer. Crystal Y2 provides a 3.6864MHz clock which is divided down internally to provide the
communication baud rate of 19.2k. IC6 interfaces to the DSP's serial ports transmit output
(BDX0), received input (BDR0), frame synchronization I/O (BFSX0 & BFSR0 used as chip a
Rev. 01
Section 4
Theory of Operation
Model 2001 Service Manual
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