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Schematic Diagrams
VGA Frame Buffer B
[16,20]
D
Sheet 21 of 62
VGA Frame Buffer
C
B
B
A
B - 22 VGA Frame Buffer B
5
4
FBB_CMD[31:0]
[16]
FBB_CLK1
[16]
FBB_CLK1#
[16]
FBB_D[63:32]
U32D
INS301633913
?
COMMON
MIRRORED
x32
x16
FBB_D32
V4
DQ0
NC
FBB_D33
V2
DQ1
NC
FBB_D34
T4
DQ2
FBB_D35
NC
T2
DQ3
NC
FBB_D36
N4
DQ4
NC
FBB_D37
N2
DQ5
NC
FBB_D38
M4
DQ6
FBB_D39
NC
M2
DQ7
NC
FBB_EDC4
R2
EDC0
NC
FBB_DBI4
P2
DBI0
NC
V10
FBB_VREFD_H
VREFD
FBB_D40
V11
DQ8
FBB_D41
V13
DQ9
FBB_D42
T11
C182
DQ10
FBB_D43
T13
DQ11
FBB_D44
N11
DQ12
FBB_D45
N13
DQ13
FBB_D46
M11
DQ14
FBB_D47
M13
DQ15
GND
FBB_EDC5
R13
EDC1
FBB_DBI5
P13
DBI1
P4
_
[16]
FBB_WCK45
WCK01
P5
WCK01
[16]
FBB_WCK45#
K4G41325FC-HC03000
_
[16]
FBB_WCK67
[16]
FBB_WCK67#
FBB_VREF_FET_H
D
Q27B
5
G
MTDK3S6R
[17,18,20,23]
GPIO10_FBVREF_ALTV
S
_
GND
[16]
FBB_EDC[7:4]
FBB_EDC4
FBB_EDC5
FBB_EDC6
FBB_EDC7
[16]
FBB_DBI[7:4]
FBB_DBI4
FBB_DBI5
FBB_DBI6
FBB_DBI7
FBVDDQ
C675
C663
C74
C643
C73
10u_6.3V_X5R_06
1u_6.3V_X5R_04
*1000p_50V_X7R_04
1u_6.3V_X5R_04
*0.01u_50V_X7R_04
X
_
_
_
X
EMI
EMI
GND
FBVDDQ
C621
C194
C198
C86
C75
C664
*0.1u_10V_X7R_04
0.1u_10V_X7R_04
0.1u_10V_X7R_04
*0.1u_10V_X7R_04
*0.1u_10V_X7R_04
0.1u_10V_X7R_04
X
_
_
X
X
_
EMI
GND
5
4
3
U32A
INS301634074
?
COMMON
MIRRORED
x32
x16
FBB_D48
A11
DQ16
NC
FBB_D49
A13
DQ17
NC
FBB_D50
B11
DQ18
NC
FBB_D51
B13
FBVDDQ
DQ19
FBB_D52
NC
E11
DQ20
NC
FBB_D53
E13
DQ21
NC
FBB_D54
F11
DQ22
NC
FBB_D55
F13
R86
DQ23
NC
*549_1%_04
FBB_EDC6
C13
EDC2
GND
FBB_DBI6
D13
DBI2
NC
X
0.4
FBB_VREFD_H
A10
VREFD
FBB_D56
A4
DQ24
FBB_D57
A2
DQ25
FBB_D58
B4
C159
R83
R76
DQ26
FBB_D59
B2
*1.33K_1%_04
80.6_1%_04
DQ27
FBB_D60
E4
DQ28
R82
FBB_D61
E2
DQ29
*931_1%_04
FBB_D62
F4
DQ30
X
_
FBB_D63
F2
DQ31
GND
GND
X
FBB_EDC7
C2
EDC3
FBB_DBI7
D2
DBI3
D4
_
FBVDDQ
WCK23
D5
WCK23
K4G41325FC-HC03000
R73
_
549_1%_04
_
R74
R75
C128
931_1%_04
1.33K_1%_04
R71
121_1%_04
_
_
GND
GND
_
_
GND
FBVDDQ
C67
C644
C645
C72
C624
10u_6.3V_X5R_06
1u_6.3V_X5R_04
1u_6.3V_X5R_04
*1000p_50V_X7R_04
*1u_6.3V_X5R_04
X
_
_
_
X
EMI
GND
FBVDDQ
FBVDDQ
C612
C615
C613
C318
C285
C317
*0.1u_10V_X7R_04
*0.1u_10V_X7R_04
*0.1u_10V_X7R_04
0.1u_10V_X7R_04
0.1u_10V_X7R_04
*0.1u_10V_X7R_04
X
X
X
_
_
X
GND
GND
3
2
1
U32B
INS301634421
?
COMMON
FBB_CMD28
L3
RAS
FBB_CMD31
G3
CAS
FBB_CMD21
G12
WE
FBB_CMD16
L12
CS
FBB_CMD24
J4
ABI
FBB_CMD26
K4
A0_A10
FBB_CMD27
K5
A1_A9
FBB_CMD18
K11
A2_BA0
FBB_CMD17
K10
A3_BA3
FBB_CMD19
H11
A4_BA2
FBB_CMD20
H10
A5_BA1
FBB_CMD23
H5
A6_A11
FBB_CMD22
H4
A7_A8
FBB_CMD25
J5
RFU_A12
FBB_CMD29
J2
RESET
FBB_CMD30
J3
CKE
J12
CLK
J11
CLK
A5
NC_RFU_A5
V5
NC_RFU_V5
0.4
FBB_VREFC1
J14
VREFC
FBB_ZQ2
J13
ZQ
FBB_SEN2
J10
SEN
R72
K4G41325FC-HC03000
1K_04
_
_
GND
U32C
INS301637050
?
COMMON
Mirrored
R401
1K_04
FBVDDQ
J1
FBB_SOE3
R404
*1K_04
SOE*/MF_VDD
_
add 1k to VDD
B10
C10
X
VSS
VDD
FBVDDQ
B5
VSS
VDD
C5
D10
D11
GND
VSS
VDD
G10
G1
VSS
VDD
G5
G11
VSS
VDD
H1
G14
VSS
VDD
H14
VSS
VDD
G4
K1
L1
VSS
VDD
K14
L11
VSS
VDD
L10
L14
VSS
VDD
L5
L4
VSS
VDD
P10
P11
VSS
VDD
T10
R10
VSS
VDD
T5
R5
FBVDDQ
VSS
VDD
A1
VSSQ
VDDQ
B1
A12
B12
VSSQ
VDDQ
A14
B14
VSSQ
VDDQ
A3
B3
VSSQ
VDDQ
C1
D1
VSSQ
VDDQ
C11
D12
VSSQ
VDDQ
C12
D14
VSSQ
VDDQ
C14
D3
VSSQ
VDDQ
C3
E10
VSSQ
VDDQ
C4
VSSQ
VDDQ
E5
E1
F1
VSSQ
VDDQ
E12
F12
VSSQ
VDDQ
E14
F14
VSSQ
VDDQ
E3
F3
VSSQ
VDDQ
F10
VSSQ
VDDQ
G13
F5
G2
VSSQ
VDDQ
H13
H12
VSSQ
VDDQ
H2
H3
VSSQ
VDDQ
K13
K12
VSSQ
VDDQ
K2
VSSQ
VDDQ
K3
M10
L13
VSSQ
VDDQ
M5
L2
VSSQ
VDDQ
N1
M1
VSSQ
VDDQ
N12
M12
VSSQ
VDDQ
N14
M14
VSSQ
VDDQ
N3
M3
VSSQ
VDDQ
R1
N10
VSSQ
VDDQ
R11
N5
VSSQ
VDDQ
R12
VSSQ
VDDQ
P1
R14
P12
VSSQ
VDDQ
R3
P14
VSSQ
VDDQ
R4
P3
VSSQ
VDDQ
V1
T1
VSSQ
VDDQ
V12
T12
VSSQ
VDDQ
V14
T14
VSSQ
VDDQ
V3
T3
VSSQ
VDDQ
K4G41325FC-HC03000
_
GND
! ! ! !!DMFWP!DP/
! ! ! !!DMFWP!DP/
! ! ! !!DMFWP!DP/
[16,17,18,20,54]
FBVDDQ
Title
Title
Title
[21] VGA Frame Buffer B
[21] VGA Frame Buffer B
[21] VGA Frame Buffer B
Size
Size
Size
Document Number
Document Number
Document Number
6-7P-N15F9-003
6-7P-N15F9-003
6-7P-N15F9-003
Custom
Custom
Custom
Date:
Date:
Date:
Thursday, March 17, 2016
Thursday, March 17, 2016
Thursday, March 17, 2016
Sheet
Sheet
Sheet
2
1
D
C
B
A
Rev
Rev
Rev
1.0
1.0
1.0
21
21
21
of
of
of
66
66
66
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