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Schematic Diagrams
Power Sequence
N15/170RD PWR SEQ
G3 to S0
G3 status
VCC_RTC
RTC_RST#
AC in status
D
EC_SLP_SUS#
PM_BATLOW#
AC_PRESENT
PWRON status
RSMRST#
SUSWARN#,
SUSACK#
SUS_CLK
USB_CHARGE_EN
Sheet 65 of 62
C
DDR1.35V_PWRGD
Power Sequence
1.0V_VCCST,
1.0V_VCCSFR
B
A
jumper shorted: 7, 11, 16, 17, 19, 21, 23, 25, 26, 28, 29, 30, 38, 44, 59, 60, 61, 63, 65, 68, 69, 70, 71, 72, 74, 75, 78, 79, 82, 83, 87
B - 66 Power Sequence
5
4
BIOS:1.05.E2A , EC:1.05.E4
47.252ms, min 9ms (tPCH01:VCC_RTC 90% to RTC_RST# Vih (VCC_RTC*75%))
min 10ms(tPCH02, tPCH03:VDD3, VDD1.0 to RSMRST#)
VDD3
98.5574ms, min 200us(tPCH06:VDD3 to VDD1.0)
VDD1.0
98.5574ms (VDD3 to 3.3VA)
3.3VA
98.5576ms, min 200us(tPCH06:VDD3 to VDD1.0)
simultaneous to VDD3
0.5V
97.23ms
203.67ms
10ms, max 90ms(tPLT02: RSMRST# to AC_PRESENT)
24.71ms
98.46ms
min 200ms(tPLT01: RSMRST# to SUSWARN#)
19.162ms, (VDD5 before RSMRST#)
VDD5
21.722ms, (DD_ON before RSMRST#)
DD_ON
21.755ms, (USB_CHARGE_EN before RSMRST#)
19.232ms, (5V before RSMRST#)
5V
14.384ms, (3.3V before RSMRST#)
3.3V
20.344ms
96.89ms, min 95ms(tPCH43:RSMRST# to PWT_BTN#)
PWR_BTN#
3.2ms
SUSC#
450us
1.74955ms, max 25ms(tCPU03:VDDQ to 1.0DX_VCCSTG)
3.906ms, min 1ms(tCPU01:VDDQ to VCCST_PWRGD) 2.087ms, min 100ns(tCPU05:VDDQ to VCCIO)
VDDQ
8.75us, max 25ms(tCPU03:VDDQ to 1.0V_VCCST)
2.136ms
512.19us
2.0788ms, min 100ns(tCPU04:1.0V_VCCST to 1.0DX_VCCSTG)
273.73ms, min 1ms(tCPU11:1.0V_VCCSFR to H_PWRGD)
43.864us
SUSB#
2.590856ms
3.8968ms, min 1ms(tCPU00:1.0V_VCCST to VCCST_PWRGD)
min 100ns(tCPU06:1.0V_VCCST to VCCSA(6.247ms), VCCIO(2.078ms))
1.0DX_VCCSTG
1.81ms, min 1ms(tCPU00:1.0DX_VCCSTG to VCCST_PWRGD)
min 100ns(tCPU06:1.0DX_VCCSTG to VCCSA(2.5898ms), VCCIO(1.661ms))
450us
273.81ms, min 1ms(tCPU12:VCCSFR_OC to H_PWRGD)
VCCSFR_OC
2.590ms
271.672ms, min 1ms(tCPU10:VCCIO to H_PWRGD)
VCCIO
4.409ms
VCCIO_PWRGD
4.409ms
2.286ms, min 1ms(tPLT04:ALL_SYS_PWRGD to PM_PCH_PWROK)
ALL_SYS_PWRGD
2.286ms, min 0ns(tCPU16:VCCST_PWRGD to PM_PCH_PWROK)
4.409ms
0ns, 0~100ns(tCPU19:VCCST_PWRGD to DDR_VTT_PG_CTRL)
VCCST_PWRGD
4.2934ms
10us, 0~35us(tCPU18:DDR_VTT_PG_CTRL to VDDQ_VTT)
DDR_VTT_PG_CTRL
4.2984ms
VDDQ_VTT
3.3889ms
3.3VS
9.900788ms
5VS
6.759336ms
267.50ms, min 1ms(tCPU09:VCCSA to H_PWRGD)
VCCSA
6.6950ms
VCCGT_PG
6.6950ms
VCORE_PG
6.6950ms
DELAY_PWRGD
267.56ms, min 1ms(tCPU08:DELAY_PWRGD to H_PWRGD)
6.6950ms
44.91ms, min 1ms(tPCH41:PM_PCH_PWROK to PCH_CLOCK)
PM_PCH_PWROK
PCH_CLOCK OUT
(24MHz), (100MHz)
261.67ms
H_PWRGD
274.264ms
12.59ms, min 1ms(tCPU08:PCH_CLOCK to H_PWRGD)
306.5886ms
PM_PWROK
306.5886ms
SYS_PWROK
S4_STATE#
306.5886ms
PLT_RST#
306.5886ms
VCORE
309.6928ms
VCCGT
407.5704.20us
PCH_THERMTRIP#_R
DDR3_DRAMRST#
DGPU_PWR_EN
3V3_AON
3V3_RUN
NVVDD
PEX_VDD
FBVDDQ
DGPU_RST#
5
4
3
Warm reset
ref to H_PDG ver 1.2, P467
S4_STATE#
236.5us, min 210us (tPCH22)
PLT_RST#
6.7ms, 1~10ms (tPCH21)
6.2563ms, min 100ns(tCPU05:VDDQ to VCCSA)
2.433s
1290.6ms
1.176s
1ms
1.35ms
2.64ms
3.96ms
5.4ms
985ms
93ms
7.04ms
106ms
3
2
1
73us, min 60us (tPCH23)
! ! ! !!DMFWP!DP/
! ! ! !!DMFWP!DP/
! ! ! !!DMFWP!DP/
Title
Title
Title
[65] N15x/170RD PWR SEQ
[65] N15x/170RD PWR SEQ
[65] N15x/170RD PWR SEQ
Size
Size
Size
Document Number
Document Number
Document Number
Custom
Custom
Custom
Date:
Date:
Date:
Thursday, March 17, 2016
Thursday, March 17, 2016
Thursday, March 17, 2016
2
1
D
C
B
A
Rev
Rev
Rev
1.0
1.0
1.0
Sheet
Sheet
Sheet
65
65
65
of
of
of
66
66
66
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