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Hughes 9100 UMOD Installation And Operation Manual

Universal modem 1-pak chassis
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HUGHES
NETWORK SYSTEMS
A HUGHES ELECTRONICS COMPANY
9100 UMOD
Universal Modem
1–PAK Chassis
Installation and Operation Manual
1022410 – 0001
Rev. 2
December 2, 1996
11717 Exploration Lane, Germantown, MD 20876
Tel: (301) 428–5500 Fax: (301) 428–1868/2830

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  • Page 1 HUGHES NETWORK SYSTEMS A HUGHES ELECTRONICS COMPANY 9100 UMOD Universal Modem 1–PAK Chassis Installation and Operation Manual 1022410 – 0001 Rev. 2 December 2, 1996 11717 Exploration Lane, Germantown, MD 20876 Tel: (301) 428–5500 Fax: (301) 428–1868/2830...
  • Page 2 An integral part of the HNS Gemini VSAT, a private digital data network for economical bypass of terrestrial data lines. The 9100 UMOD is available in a single modem chassis referred to as the 1–PAK as shown in figure 1-1 and in a ten–modem chassis called the 10–PAK.
  • Page 3 Per Carrier (SCPC) and Multiple Channel Per Carrier (MCPC) systems. Figure 1-2 shows a typical SCPC/MCPC application. PACKET SWITCH VOICE DATA EXTERNAL MULTIPLEXER/DEMULTIPLEXER COMBINED VOICE AND DATA HUGHES NETWORK SYSTEMS 9100 UNIVERSAL • MODEM M&C FUNCTIONS AVAILABLE THROUGH KEYPAD/DISPLAY OR...
  • Page 4 Sequential, Reed-Solomon, and Concatenated FEC coding; Internal framing to support IDR, IBS, and SMS framing, single- and twin-bearer D&I multiplexing, and Engineering Service Channel (ESC) supervisory overhead. All features are software-selectable, there are no switches or jumpers to configure. • Single-card design—The entire modem, framing unit, and multiple terrestrial and IF interfaces are integrated into a single circuit board.

  • Page 5: Specifications

    Modem 1-PAK chassis. dimensions 1-PAK chassis Weight: 22.5 pounds (10.2 kg) Refer to figure 2-1 for height, width, and depth dimensions. 17.3 in. (43.9 cm) HUGHES NETWORK SYSTEMS • 4.3 in. (10.9 cm) (LESS THAN 3U) 17.3 in. (43.9 cm) 19.0 in.

  • Page 6: Environmental Specifications

    Environmental This section describes the 9100 UMOD single-modem chassis specifications temperature, altitude, and humidity specifications. Temperature The temperature requirements are: • Operating range: 32 °F to 122 °F (0 °C to 50 °C) • Storage range: -40 °F to 167 °F (-40 °C to 75 °C)
  • Page 7 Forward error Types: Viterbi, Sequential, Concatenated Viterbi/Reed-Solomon correction Rates: 1/2, 3/4, 7/8, 1 (No coding) (Sequential coding limited to R1/2 and 2.048 Mbps) Data interfaces DIM: RS-232, RS-449, V.35 GIM: G.703 (T1, balanced and unbalanced E1, balanced and unbalanced T2, E2) Scrambling CCITT V.35 and IESS-309 (IBS) Reference stability...

  • Page 8: Demodulator Specifications

    Input voltages The 9100 Universal Modem power supply automatically adjusts to accept the following input voltage range: 1-PAK chassis: 100 to 240 Vac (47 to 63 Hz) Modulator This section describes 9100 Universal Modem modulator specifications. specifications Transmit power Transmit power: -5 dBm to -30 dBm Resolution: 0.1 dB Accuracy: ±0.25 dB On/Off isolation: >...
  • Page 9 Bit error rate Refer to section 2.3, “System specifications” and table 2-2 . performance Table 2-2 9100 Universal Modem typical bit error rate vs. E performance specifications Modulation Forward Error type Correction Rate for BER shown below Remarks (FEC) Type (FEC) Type 1E–3 1E–4...
  • Page 10 Chapter 3 UMOD hardware theory of operation The UMOD is a digital satellite modem that serves as a link between the user’s baseband data terminal equipment (DTE) and the IF frequency interface with a radio or up/downconverter. In addition to the basic phase shift keying (BPSK and QPSK) functions, the UMOD performs data processing such as forward error correction (FEC), open-network framing, Doppler buffering, and data multiplexing.
  • Page 11 Figure 3-1 UMOD functional block diagram 3–2 UMOD hardware theory of operation 1022410– 0001 Rev. 2...

  • Page 12: Customer Interface

    transmission across the backplane to the IF OUT connector on the IF panel (located on the rear of the UMOD). Customer interface The CIM is the interface between the user’s equipment and the module UMOD. Transmit data from the DTE device can be input to the UMOD at the CIM in the following electrical interface formats.
  • Page 13 The DIM provides level translation to TTL, buffering, and termination (if required) for the baseband transmit data. The DIM supports the following electrical formats: EIA RS-232 (up to 64 kbps), EIA RS-422/449 (up to 8.448 Mbps), or CCITT V.35 (up to 8.448 Mbps). The DIM takes transmit data from the backplane, converts it to TTL level, performs retiming and phase correction on the converted data, then outputs the data and clock signals to the...
  • Page 14 Internal framing unit The optional internal framing unit (IFU) daughtercard connects between the terrestrial data interface daughtercard (either a DIM or a GIM) and the UMOD. In open-network configurations, it provides single- or dual-bearer D&I multiplexing, and framing and buffering support for the following Intelsat and Eutelsat services: •...
  • Page 15 • 64 kbps. Data rate is 68.26667 kbps (64 x 16 / 15) after overhead is added. • 512 kbps. Data rate is 546.1333 kbps (512 x 16 / 15) after overhead is added. • 1544 kbps. Data rate is 1647 kbps (1544 x 16 / 15) after overhead is added.
  • Page 16 • 384 kbps. Data rate is 409.600 kbps (384 x 16 / 15) after overhead is added. • 768 kbps. Data rate is 819.200 kbps (768 x 16 / 15) after overhead is added. • 1536 kbps. Data rate is 1638.400 kbps (1536 x 16/15) after overhead is added.

  • Page 17: Channel Encoding

    Channel encoding The channel encoding section of the UMOD motherboard formats the data before it is modulated. The encoding circuitry (see figure 3-2 on page 3–8) performs the functions specified in IESS-308 (IDR) and IESS-309 (IBS) that relate to forward error correction and scrambling. [In addition, this circuit performs the channel coding functions required to operate in a closed HNS Telephony Earth Station (TES) network as well as the HNS Personal Earth Station (PES) network.]...
  • Page 18 The channel coding circuitry interfaces to the internal framing unit or directly to the terrestrial interface via processor control. Serial data from either source is processed by the transmit channel coding and then routed to the modulator interface where preamble and postamble insertion occurs only when in TES mode of operation.
  • Page 19 Forward error correction encoding The following is a list of the forward error correction (FEC) encoding methods supported by the UMOD channel coding section: • Rate 1/2, 3/4, and 7/8 convolutional encoding (K=7) • Rate 1/2 and 3/4 convolutional encoding (K=36) •...
  • Page 20 Transmit filtering Transmit filtering is performed digitally on the data from the channel encoding section (see figure 3-3 on page 3–11). Dual finite impulse response (FIR) filters—part of the FIR/NCO ASIC—perform baseband spectral shaping on the I and Q channels. To meet UMOD requirements, the filter coefficients are programmable, not fixed.
  • Page 21 Modulator Filtered I and Q channels are input to an analog quadrature amplitude modulator to generate the desired modulation (see figure 3-4 on page 3–12). BPSK and QPSK modulation formats are supported. MODULATED IF Σ BASEBAND TX LO (FROM SYNTHESIZER) QUADRATURE SPLITTER Figure 3-4...
  • Page 22 SYNTHESIZER SYNTHESIZER FIR/NCO FIR/NCO ASIC ASIC CONTROL TX LO PROCESSOR 52-88 MHz 104-176 MHz 104-176 40 MHz Figure 3-5 Transmit synthesizer circuit block diagram The NCO output is converted to an analog signal by a D/A converter, filtered to remove alias components, and sent to the input of a conventional phase-locked-loop (PLL) frequency multiplier.

  • Page 23: Receive Operations

    The ALC loop functions as follows: the desired output power of the transmitter is set by a digital word from the control processor (CP). It is then converted to an analog reference voltage by a D/A converter. The output power of the transmit IF signal is converted to a DC level by an envelope detector and lowpass filter.
  • Page 24 Backplane The backplane serves as internal electrical interface between the IF IN port on the IF panel and ultimately the UMOD motherboard in any occupied chassis slot. Received IF signals are routed across the backplane to the UMOD motherboard. Once the receive data has been processed, the backplane routes data, control, and clock signals to the CIM.
  • Page 25 The A/D converters digitize the I and Q signals to 8 bits and route the data to the I and Q inputs of the receive FIR/NCO ASIC. Receive synthesizer The receive synthesizer is similar to the transmit synthesizer with the main difference being that the synthesized frequency is either 20 or 40 MHz above the desired receive IF frequency, depending on the selected receive band of 70 or 140 MHz, respectively.
  • Page 26 The FIR/NCO and A/D converter both use the same clock so that sampling of the signal and processing by the FIR/NCO and demodulator ASICs are synchronous. The clock signal into the demodulator ASIC is provided by the FIR/NCO as a byproduct of the sample rate decimation process.
  • Page 27 The output of the demodulator is I and Q demodulated data at the transmitted symbol rate, each quantized to one sign bit and two magnitude bits. Soft-decision mapping is configurable for BPSK and QPSK operation. Channel decoding The channel decoding section of the UMOD motherboard is responsible for formatting the data after it has been demodulated.
  • Page 28 • Reed-Solomon decoding • De-interleaving for use with Reed-Solomon decoding • Concatenated Viterbi/Reed-Solomon decoding The encoding circuit operates in the following modes: • BPSK—Rate 1 (no FEC); Rates 1/2, 3/4, and 7/8 Viterbi only; Rate 1/2 Sequential only; Rates 1/2, and 3/4 with Viterbi and Reed-Solomon concatenated •...
  • Page 29 differential coding may be bypassed when not required. QPSK differential decoding is used only in R1 QPSK. The BPSK differential decoder is used for R1 BPSK, and when FEC is enabled. Forward error correction decoding The following is a list of the forward error correction (FEC) decoding methods supported by the channel decoding section: •...
  • Page 30 information from the data, descrambles it, and then outputs the signals to the terrestrial data interface daughtercard. For a D&I operation, frames enter the IFU from the UMOD motherboard. The IFU removes ESC supervisory information from the frames, descrambles them, and then outputs the frames to the terrestrial data interface daughtercard.
  • Page 31 both D&I multiplexers are operate at the same rate, however, the GIM is designed to allow for a mixed-rate operation. For example, the user can set up the drop multiplexer (SD and DDO ports) to operate in T1 mode, and the insert multiplexer (RD and IDI ports) to operate in E1 mode.

  • Page 32: System Functions

    System functions System functions support the receive and transmit functions, and provide means for controlling, monitoring, and testing the UMOD. The functions include: • Control processor (CP). The CP is responsible for UMOD control and status monitoring, as well as data transport in the case of asynchronous baseband data.
  • Page 33 and IESS-308), and differential encoder/decoder type selection (BPSK, QPSK). • Internal framing unit. The CP controls IDR/IBS mode selection, ESC audio/64-Kb data selection, and monitors frame synchronization. • Doppler buffer. The CP enables the Doppler buffer; sets the buffer depth; and monitors buffer fill status for overflow or underflow conditions.
  • Page 34 ADDRESS/DATA/CONTROL BUS RESET SUPERVISOR MICRO- PROCESSOR 128 K TES 64 K UMOD 256 K FLASH 256 K FLASH BOOT PROM BOOT PROM MEMORY MEMORY ADDRESS/DATA/CONTROL BUS REAL-TIME FRAMING BER TEST TIMING 448 K CLOCK UNIT MODULE LOGIC GENERATOR PSRAM EEPROM INTERFACE ADDRESS/DATA/CONTROL BUS SCC INTERRUPT...
  • Page 35 Transmit timing generator Figure 3-12 is a block diagram of the transmit timing generator. The TXTG provides the following clock signals: • Transmit information rate clock (user rate) • Transmit information rate • Framing unit overhead clock • Transmit overhead channel rate clock (information rate x 256/255) •...
  • Page 36 • External clock—The transmit timing generator is phase locked to a user supplied clock (either a terrestrial data clock or a station clock). Receive timing generator Figure 3-13 is a block diagram of the receive timing generator. The RXTG provides the following clocks signals: •...
  • Page 37 CONTROL PROCESSOR 20-40 MHz RX-4NSYM CLK INFO RATE PHASE OVERHEAD FRAMING CONTROL PUNCTURE VITERBI COUNTERS REED-SOLOMON DEMOD SYM CLK RATE FIFO DEMOD SYM DATA DATA TO CHANNEL DECODER RX DATA (DTE RXD) DATA FROM CHANNEL DECODER DOPPLER FIFO CONTROL RXR1 CLK PROCESSOR (DTE INT CLK) STATION CLK...
  • Page 38 Monitor and control This section describes the Universal Modem monitor and control description (M&C) feature that is used to configure the UMOD for operation. The M&C feature provides the following: • General configuration controls. These provide the user with options to modify routine settings on the UMOD (for example, setting the modem’s mode of operation, setting the date and time, configuring the modem to automatically restart after a power cycle, etc.).
  • Page 39 CIM. The port—labeled M&C—enables the user to configure and monitor the UMOD using built-in terminal software or the optional Windows-based M&C software. HUGHES NETWORK SYSTEMS RS–232 LINK • U N I V E R S A L...
  • Page 40 UMOD to configure or monitor UMOD functions. 4 X 20 LCD PANEL KEYPAD LED WINDOW HUGHES NETWORK SYSTEMS • Figure 3-15 1-PAK chassis front panel The front panel consists of a 16-key keypad, a 4x20-character liquid-crystal display (LCD) panel and a light-emitting diode (LED) window.
  • Page 41 LCD panel main menu The main menu as illustrated in figure 3-16 displays when the UMOD power is turned on or when selected during the display of another menu or command/status message. (0) Main menu 102:Power Up 1 Config 4 Status 2 Diag 5 Alarms 3 Control...

  • Page 42: Terminal Software

    Note The decimal point (.) key is not functional in the current version. (0) Main menu 102:Power Up 1 Config 4 Status 2 Diag 5 Alarms 3 Control 6 General Ins Port Bal (1) Config menu BAL UNBAL 1 Tx Cfg 4 DataInt Ins Port Code 2 Rx Cfg...
  • Page 43 and the M&C configuration commands are provided in Appendix Windows-based UMOD M&C software The Windows-based UMOD M&C software runs in Microsoft Windows, a graphical user interface (GUI). Windows applications are much easier to use than a CLI because the operator uses a mouse to select descriptive terms instead of hard-to-remember mnemonic codes.
  • Page 44 When UMODs are connected using one of the Hughes Network Systems, Inc. communications formats, a user selectable overhead channel (OHC) may be added to the user data, through which the far UMOD can be controlled by the near terminal/PC connection.
  • Page 45 M&C multidrop interface Figure 3-20 shows the multidrop connection. All modems operate independently (in other words, there is no master or slave). MULTIDROP BUS MODEM n v 32 MODEM 1 MODEM 2 Figure 3-20 Multidrop bus On the multidrop bus, a transmit frame can be received by all modems, including the originating modem.
  • Page 46 Redundancy option The 9100 UMOD provides an optional redundancy feature that allows one UMOD motherboard to be reserved as a spare for n operational UMODs (where n is selected from 1 through 8). This feature enables the user to avoid communications disruptions caused by the failure of a UMOD.
  • Page 47 The redundant modem is inhibited from transmitting until it takes active control from the failed primary modem. However, to speed acquisition during a switchover, the redundant modem will use the frequency offset information collected during polling to assist its acquisition. Detecting primary Each of the primary modems has a modem failure status line modem failures...
  • Page 48 Each redundancy storage profile contains primary modem operating configurations, such as receive frequency offset, operating configuration level, service state (operational or failed), and missed poll count. These values are stored in memory and are updated each time a poll response is received from the primary UMOD.
  • Page 49 • The redundant UMOD automatically switches in at the first major failure detected in the primary UMOD. (A major failure could be a malfunction in the primary UMOD’s transmit or receive timing generators, a modulator failure, etc.). • The redundant UMOD maintains a valid configuration table that contains all UMOD parameters such as interface parameters, bit rates, synthesizer frequencies, and coding types that the primary UMOD has been set for.
  • Page 50 UMOD DAUGHTER MOTHER CARD BOARD 9100 UMOD Figure 3-24 UMOD interface to user DTE device through the DIM The DIM is controlled by the CP (located on the UMOD motherboard) through the CP interface (see figure 3-25 on page 3–42). The CP interface consists of three registers: •...
  • Page 51 DATA FLOW REGISTER CLOCK RESET STATUS FROM UMOD TPC-CS INTERFACE REGISTER MOTHERBOARD READ CONTROL WRITE PROCESSOR ADDRESS CONTROL DATA REGISTER INTERFACE DECODER CONTROL TTL/RS232 RxR1 TTL/RS422 TO DTE TxR1 TTL/V.35 CONVERTER RS232/TTL RS422/TTL FROM TO UMOD V.35/TTL CONVERTER TERM-TIM RS422/TTL TO DATA FROM FLOW REGISTER...
  • Page 52 The DIM supports the baseband terrestrial interface signals by providing level translation, buffering, and termination (if required). Terrestrial interface signals include data, timing, and control signals. Data signals Baseband terrestrial interface data signals are as follows: • Transmit Data (SD). SD is originated by the DTE, to be transmitted over the satellite channel by the UMOD.

  • Page 53: Control Signals

    to data phase relationship is not important, as far as it meets the distortion and jitter specifications outlined in the RS-334 standard. This is because the DIM provides a clock phase correction circuitry. By default, the falling edge of the terminal timing clock (TT) is used for retiming the transmit data (SD).
  • Page 54 DAUGHTER MOTHER CARD BOARD TWIN-BEARER D&I G703 INTERFACE (E1 OR T1) 9100 UMOD Figure 3-26 UMOD interface to DTE device through a GIM The GIM supports two bipolar baseband interfaces: primary and twin-bearer D&1. Primary bipolar interface The primary bipolar interface services the main CIM data ports—RD (receive data) and SD (send data)—and is capable of...
  • Page 55 (balanced), E1 (balanced or unbalanced), T2 (balanced or unbalanced), and E2 (unbalanced). Note The terms T1, E1, T2, and E2 describe bipolar digital data links that conform to the following electrical interfaces (as defined in CCITT G703 and T1.102): D T1: Primary rate carrier at 1544 kbps. Also referred to as DS1.
  • Page 56 Figure 3-27 GIM block diagram 1022410– 0001 Rev. 2 UMOD hardware theory of operation 3–47...
  • Page 57 The T1/E1 LIU uses either alternate mark inversion (AMI) or B8ZS encoding for T1 signals and HDB3 encoding for E1 signals. AMI encoding, shown in figure 3-28, is an analog representation of non-return-to-zero (NRZ) digital data. The coding rules are: •...
  • Page 58 E2/T2 receive operations. In the receive direction, the RD LIU takes RxC and RxD lines from the UMOD motherboard or IFU and produces bipolar pulses of appropriate shape. The pulses are transformer-coupled. The T2 or E2 signals are output across the backplane to the RD port of the CIM.
  • Page 59 Drop operations. For a drop operation, a T1 or E1 bearer enters the SD port on the CIM and is routed to the SD E1/T1 LIU on the GIM. Data (TxD) and clock (TxC) are recovered and sent to the IFU and UMOD motherboard.
  • Page 60 Internal framing unit The optional internal framing unit (IFU) daughtercard connects daughtercard between the terrestrial data interface daughtercard (either a DIM or a GIM) and the UMOD. In open-network configurations, the IFU provides a single- or dual-bearer drop-and-insert multiplexer; and framing and buffering support for the following Intelsat and Eutelsat services: •...
  • Page 61 original data can be passed directly into the internal Doppler/plesiochronous buffer, or to the DIM or GIM. If the buffer is activated, it retimes the data so that it is synchronized to the local network clock, and provide the output to the terrestrial network through the DIM or GIM.

  • Page 62: Backward Alarms

    supervisory information added at the transmit end of the link is removed, and the original data recovered. This data can either be passed directly into the internal Doppler/plesiochronous buffer, or to the GIM or DIM. If the buffer is activated, it will re–time the receive data synchronized to the local network clock, and provide the output to the terrestrial network through the DIM or GIM.
  • Page 63 A backward alarm is a single bit of the satellite overhead, that can be sent from one station to the others. Because it is part of the overhead, sending a backward alarm does not affect the traffic. Backward alarms are sent to the far end of a satellite link to alert that there is trouble with the receive side that may be resulting from improper transmission.

  • Page 64: Idr Backward Alarms

    generate an alarm on the outgoing transmit data. IDR backward alarms Backward alarms are more complicated in the IDR service because an IDR carrier can be multi-destinational, that is, the carrier may be received by more than one destination. All IDR carriers have four backward alarm channels.
  • Page 65 Multi-destination carriers. Figure 3-33 depicts the manner in which the four backward alarms are used. INCOMING BACKWARD ALARM #1 OUTPUT (TX FAIL???) BACKWARD SEND BACKWARD ALARMS #2—#4 ALARM INPUTS NOT USED 2 & 3 1 2 3 4 9100 IFU RX FAIL 9100 IFU TX PATH...
  • Page 66 At station A, however, there are two receive channels, but only a single transmit channel. Here the receive prompt alarms from the two receive sections activate two separate outgoing backward alarms. The carrier from station B activates backward alarm 2, and the carrier from station C activates backward alarm 3.

  • Page 67: Drop And Insert

    Drop and Insert The drop-and-insert (D&I) feature enables the UMOD to extract (drop) timeslots from an incoming T1, E1, or CEPT bearer, transmit those outgoing timeslots at a reduced aggregate rate, and place (insert) received incoming timeslots onto preselected timeslots in the outgoing bearer. The UMOD supports three types of D&I operations: single-bearer, twin-bearer, and cascading (see figure 3-34).
  • Page 68 Single-bearer D&I operation In the single-bearer configuration, the CIM ports can be configured as follows (see figure 3-35): • The transmit (drop data) cable is connected to port SD (send data), and the receive (insert data) cable is connected to port RD (receive data).
  • Page 69 • The transmit (drop data) cable is connected to port SD (send data). A short cable connects to the DDO (drop-data-out) and IDI (insert-data-in) ports. The receive (insert data) cable is connected to port RD (receive data). The IFU D&I feature consists of a G732/G733 drop multiplexer (MUX) and a G732/G733 insert multiplexer (see figure 3-35 on page 3–59).
  • Page 70 Twin-bearer D&I operation Note Twin–bearer operation in the 10–PAK chassis is limited to a balanced G.703 interface. The unbalanced G.703 does not permit twin–bearer operation. The UMOD can be configured to D&I two bipolar, balanced bearers. When a twin-bearer configuration is used, the IFU is configured as shown in figure 3-36, with the drop multiplexer completely independent from the insert multiplexer.
  • Page 71 Cascading D&I operation The IFU D&I feature enables multiple UMOD chassis to be cascaded, eliminating T1 or CEPT multiplexer equipment in many instances. As shown in figure 3-37, a single bearer enters the station carrying several low-rate channels. Each IFU drops the appropriate data from the bearer and transmits it over satellite, the received data is inserted into the same bearer.

  • Page 72: Loopback Tests

    combined onto the same carrier. If the second and third carriers are 64 kbps and 128 kbps and are intended for the same destination, one entire modem/framing unit will be saved, by carrying both users’ data in a single 192-kbps carrier. Loopback tests and The UMOD provides loopback tests and a built-in bit error rate tester (BERT) as simple methods for verifying satellite link...
  • Page 73 • Near loopback. As shown in figure 3-39, a near loopback receives user data at the near UMOD, loops the data through the DIM or GIM, and transmits it back to the user device. This loopback verifies that user equipment, connecting cables, and UMOD terrestrial data interface circuits are functional.
  • Page 74 • Far loopback. A shown in figure 3-40, a far loopback is a complete test of the near UMOD and most of the far system excepting the far DTE device. The far loopback tests the following equipment: - Near DTE device and connecting cables - Near UMOD, radio frequency terminal (RFT), and antenna subsystem - Satellite transponder...
  • Page 75 • Simultaneous loopback (see figure 3-41). This loopback configures one of the UMODs to perform a near and far loopback test. If the UMOD at the far end of the link is set to perform a far loopback, the combined tests will verify functioning of all components in the communications link.
  • Page 76 BERT loopback connections The BERT performs the following loopback connections: • Normal loopback (see figure 3-42). This test connects the loopback transmit and receive to the normal satellite data. Terrestrial UMOD Main Card Port Card Modulator TX IF Encoder BERT Loopbacks (optional) Demodulator...
  • Page 77 • IFU loopback (see figure 3-44). This loopback connects the transmit output from the BERT to the input of the internal framing unit (IFU). The receive data from the IFU is connected to the BERT. The transmit and receive configuration parameters must be the same (that is, if the UMOD is configured for QPSK transmit modulation and BPSK receive modulation, the modulation for both transmit and receive must be set for QPSK or BPSK before running...

  • Page 78: Transmit Timing

    independent–timed systems using either plesiochronous or non–plesiochronous configurations. Figure 3-45 UMOD transmit and receive timing functional block diagram ** Indicates availability in UMOD software release 3.03 and above. 3.10 Transmit timing For the modulator there are four transmit clock source options (TCS) or modes: internal (INT), TXDTE external terminal timing modes (TT), external station clock input (STA), and recovered from...
  • Page 79 mode. Use this mode only when the TT clock’s stability is within the UMOD specification ($100ppm). Clock fault operation If this clock input completely disappears, the UMOD will generate condition and will continue to transmit using the Tx ext clock fail internal clock as reference.
  • Page 80 When the RT and ST clocks are the same frequency but are not phase coherent, they can drift $12–bit periods. If the Demod is not locked the UMOD will generate a Tx ext clock condition, the ST clock will use the internal clock as a fail reference.
  • Page 81 generated RT clock are phase locked but are not phase coherent. The STA and RT clocks do not have to be at the same frequency. Note While in this mode, the PLL will reference the internal oscillator if there is no station clock input. Clock fault operation If this clock input completely disappears, the UMOD will generate condition, and the RT clock will default to...
  • Page 82 This section describes loop–timed systems with phase coherent and limited phase coherent DTE for different software versions. Software versions are grouped as 2.01 and lower, and 3.03 and higher. Looped–timed systems For software version 2.01 and lower. The looped–timed systems phase coherent DTE configurations for software versions 2.01 and lower are illustrated in figures 3-46 and 3-47and assume the following:...
  • Page 83 Figure 3-47 Looped–timed system, phase coherency without external clock (SW 2.01) Looped–timed sys. For software version 2.01 and lower. The examples shown in limited coherent DTE figures 3-48, 3-49, and 3-50 illustrate looped–timed systems with limited phase coherency, and assume the following: •...
  • Page 84 Figure 3-48 Looped–timed, limited phase coherency, DTE clock reference (SW 2.01) Figure 3-49 Looped–timed, limited phase coherency, station clock input (SW 2.01) 1022410– 0001 Rev. 2 UMOD hardware theory of operation 3–75...
  • Page 85 Figure 3-50 Looped–timed, limited phase coherency, internal clock input (SW 2.01) 3–76 UMOD hardware theory of operation 1022410– 0001 Rev. 2...
  • Page 86 Looped–timed sys. For software version 3.03 and higher. The examples shown in phase coherent DTE figures 3-51, 3-52, and 3-53 illustrate looped–timed systems with phase coherency, and assume the following: • The DTE data rates are all the same • The DTE requires a slaved phase relationship where no phase wander is allowed •...
  • Page 87 Figure 3-52 Looped–timed, phase coherent using station clock input (SW 3.03) Figure 3-53 Looped–timed, phase coherent, using internal clock input (SW 3.03) 3–78 UMOD hardware theory of operation 1022410– 0001 Rev. 2...
  • Page 88 3.13 Independent–timed In an independently-timed system, the satellite link is operated systems with independent transmit and receive timing. The DTE device at each end of the link must be able to withstand propagation delays, along with transmit and receive clocks that may be far out of synchronization due to their independent operation.
  • Page 89 - If the station clock is used, TCS must be set to TXDTE, and RCS must be set to Station (see figure 3-55) Figure 3-54 Independent–timed, phase coherency w/o external clock (SW 2.01) Figure 3-55 Independent–timed, phase coherency with external clock (SW 2.01) 3–80 UMOD hardware theory of operation 1022410–...
  • Page 90 Independent–timed, For software version 2.01 and lower. The examples shown in limited phase coh. DTE figures 3-56, 3-57, and 3-58 assume the following: • The DTE data rates are all the same The DTE phase wander up to $3 clock cycles of the lower •...
  • Page 91 Figure 3-57 Looped–timed,limited phase using station clock (SW 2.01) Figure 3-58 Looped–timed, phase or limited phase using internal clock (SW 2.01) 3–82 UMOD hardware theory of operation 1022410– 0001 Rev. 2...
  • Page 92 Independent–timed, For software version 3.03 and higher. For an independent–timed phase coherent DTE plesiochronous system, you may use the modem’s internal clock or an external station clock. The examples shown in figures 3-59, 3-60, and 3-61, assume the following: • The DTE data rates are all the same •...
  • Page 93 Figure 3-60 Independent–timed, phase or limited phase, station clock (SW 3.03) Figure 3-61 Independent–timed, phase or limited phase, internal clock (SW 3.03) 3–84 UMOD hardware theory of operation 1022410– 0001 Rev. 2...
  • Page 94 Independent–timed, For software version 3.03 and higher. The examples shown in limited phase coh. DTE figures 3-62, 3-63, and 3-64 assume the following: • The DTE data rates are not the same The DTE will allow phase slips (wander) up to "3 clock •...
  • Page 95 Figure 3-63 Independent–timed, limited phase using station clock (SW 3.03) Figure 3-64 Independent–timed, phase or limited phase, internal clock (SW 3.03) Independent–timed For these systems, virtually all clocking options apply because non–plesiochronous clock phase and frequency are independent on both links. At each end, the transmit clock source (TCS) selections are: internal (INT), TXDTE (external TT), external station clock input (STA), and recovered from Demod (REC).
  • Page 96 The RCS selections are: REC, TXDTE, and STA. For the software release 3.03 and above, there is a fourth mode, INT. 1022410– 0001 Rev. 2 UMOD hardware theory of operation 3–87...
  • Page 97 3–88 UMOD hardware theory of operation 1022410– 0001 Rev. 2...

  • Page 98: Operational States

    Chapter 4 Operational states The UMOD operational states are: • Initialization • System diagnostics • Signal acquisition • Tracking • Fade • Idle The following sections describe the operational states. Initialization At startup (or after a reset), the modem initializes—prepares for operation—the following UMOD hardware components: •...
  • Page 99 During initialization, the control processor (CP) scans the 0FFF:0 memory location in the 128–Kbyte TES boot EPROM firmware (see figure 4-1) to determine which operating mode will be used: UMOD operating mode or TES channel unit operating mode. The UMOD will always select UMOD operating mode (TES channel unit mode is used for another HNS product).

  • Page 100: System Diagnostics

    System diagnostics The UMOD performs full–function diagnostics tests after initialization. These tests include: • Performing an IF loopback test. In this test, the internal bit error rate (BER) tester loops data through the UMOD transmit and receive circuitry, including the terrestrial data interface daughtercard (either a DIM or GIM), and the optional internal framing unit (IFU).
  • Page 101 A user–initiated acquisition (with a GO or GO RX), the acquisition sweep starts at the center frequency, fcenter. The center frequency where acquisition sweep starts can be calculated by fcenter = fnom + foffset. The nominal frequency is entered with the RFQ command and the frequency offset is entered with the AO command.

  • Page 102: Hardware Installation

    Chapter 5 Hardware installation This chapter contains the following procedures for installing the hardware components of the 9100 Universal Modem 1-PAK chassis: • Functional verification (page 5–3)—describes testing the UMOD to verify that it is operational before connecting it to the DTE device. Note Before installing the modem, the following tasks should have already been completed:...

  • Page 103: Site Preparation

    You will need the following tools and materials for installing the Universal Modem: • Flat blade screwdrivers, assorted sizes • Phillips screwdriver • Input/output (I/O) cables • Shelf, rack mount 9100 UMOD HNS part # 1019180–0001 5–2 Hardware installation 1022410– 0001 Rev. 2...
  • Page 104 Functional This section describes testing the UMOD to verify that it is verification operational before connecting it to the user’s DTE device. Remove the modem from its shipping container. Place the modem at the designated location. Ensure that the O/| power switch is set to O (off). (See figure 5-1 for switch location.) 0/1 POWER SWITCH...
  • Page 105 Caution The UMOD power supply automatically adjusts to accept an input voltage of from 100 to 240 Vac (47 to 63 Hz). Verify that the proper voltage is present before plugging the ac cord into the receptacle. Failure to do so could result in equipment damage.
  • Page 106 Upon startup, the light-emitting diode (LED) on the UMOD front panel will begin cycling through a series of codes as the UMOD initializes its internal components and performs full-function diagnostics self-tests. (See figure 5-3 for LED location.) If the tests are successful, you will see the sequence of displays on the LED readout as presented in table 5-1 .
  • Page 107 Table 5-1 UMOD self-test diagnostics LED Display Definition Random access memory (RAM) test. This test writes a value to all RAM addresses, and veri- fies that the value can be read correctly. Central processing unit (CPU) test. This test examines the microprocessor on the UMOD board Internal timer test.

  • Page 108: Cable Installation

    Verify after approximately 30 seconds, that a U is displayed on the UMOD light-emitting diode (LED). Also verify that the cooling fan is operating. If a test fails, refer to chapter 10, “Troubleshooting.” Set the O/| power switch to O. Verify that the front panel LEDs are extinguished.
  • Page 109 Install the DTE interface cables onto the appropriate connectors on the CIM (see figure 5-4). If your UMOD will be using an external clock source, connect the cable onto the STATION CLK port (see figure 5-4). UNBALANCED G.703 UNBALANCED G.703 BALANCED G.703 CONNECTION CONNECTION...
  • Page 110 Installing the This section describes installing multidrop cables between as multidrop cables many as 30 Universal Modems. The multidrop cables link chassis together to form a monitor and control (M&C) network so that users can monitor UMOD status, and control many UMOD functions.
  • Page 111 Install a multidrop cable connector onto connector P2 on the first UMOD chassis (chassis #1). Connect the other end of the cable to connector P3 on chassis #2. See figure connector locations. M&C G.703 BAL TO DTE RC GND REDUNDANCY ESC SIGNALS STATION CLK MULTIDROP...
  • Page 112 Setting the chassis This section describes configuring switches S1 through S4 to set ID code the chassis identification (ID) code (see figure 5-8 for locations). Note You need to obtain the four-digit hexadecimal chassis ID code before continuing. In this procedure, the example ID code will be 6 E B 1 ( the same as that shown in figure 5-8).
  • Page 113 Note If you are using the redundancy option, both UMOD chassis must be set to the same ID code. (For example, if the primary UMOD ID code is 6EB1, the redundant UMOD would also be 6EB1.) Using a 1/4-inch flat-blade screwdriver, set switch S1 to the same setting as the first (leftmost) hexadecimal digit in your chassis ID code.
  • Page 114 Installing the Perform the following procedure to install the redundancy cables redundancy cables between two single slot UMOD chassis. Install the end of the redundancy cable connector labeled PRIMARY onto the REDUNDANCY connector on the primary UMOD chassis (see figure 5-9). M&C G.703 BAL TO DTE...

  • Page 115: Completing The Installation

    Completing the This section describes testing the UMOD to verify that it is installation operational. Set the O/| power switch to | (activated). Upon startup, the LED on the UMOD board will begin cycling through a series of codes as the UMOD initializes its internal components and performs full-function diagnostics self-tests.
  • Page 116 Depending on how your UMOD is configured, once the full-function diagnostics are complete one of the following LED codes will be displayed: - If the UMOD is configured for autostart operation, it will display an A to indicate that it is acquiring a carrier, then display an L to show that it has locked onto the carrier signal.

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