Lvds - Digi ConnectCore 8X Hardware Reference Manual

Interfaces
One LVDS connector (J7), located on the bottom side of the board.
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One MIPI connector (J8), located on the top side of the board, which is not populated by
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default.
Both connectors offers access to the same MIPI_DSI0 bus of the CPU, which can be configured to
work as MIPI or LVDS. Therefore, only one of the display connectors can be used at any given time.

LVDS

The LVDS interface is available over a 20-pin, 1.25 mm pitch connector, which provides access to the
following LVDS capabilities:
Up to four LVDS differential data pairs.
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One LVDS differential clock pair.
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Interrupt signal with 10K pull-up resistor for touch screen.
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Control of the backlight contrast.
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I2C, shared with the MIPI-DSI connector.
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3.3V power supply.
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5V power supply.
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The following table describes the pinout of the LVDS connector:
Schematic signal
Pin name
1 3V3_EXT
2 MIPI_DSI0_DATA0_N
3 MIPI_DSI0_DATA0_P
4 GND
5 MIPI_DSI0_DATA1_N
6 MIPI_DSI0_DATA1_P
7 GND
8 MIPI_DSI0_DATA2_N
9 MIPI_DSI0_DATA2_P
10 GND
11 MIPI_DSI0_CLK_N
12 MIPI_DSI0_CLK_P
13 GND
14 MIPI_DSI0_DATA3_N
15 MIPI_DSI0_DATA3_P
ConnectCore® 8X SBC Express Hardware Reference Manual -- Preliminary
Description
Output 3.3V power supply line
Transmission pair 0 data line (-)
Transmission pair 0 data line (+)
Transmission pair 1 data line (-)
Transmission pair 1 data line (+)
Transmission pair 2 data line (-)
Transmission pair 2 data line (+)
Transmission pair clock line (-)
Transmission pair clock line (+)
Transmission pair 3 data line (-)
Transmission pair 3 data line (+)
LVDS/MIPI-DSI display
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