Advanced Chipset Features Option - Elitegroup Computer Systems P6IWM Manual

Advanced Chipset Features Option

These items define critical timing parameters of the main-
board. You should leave the items on this page at their default
values unless you are very familiar with the technical specifi-
cations of your system hardware. If you change the values
incorrectly, you may introduce fatal errors or recurring instabil-
ity into your system.
CMOS Setup Utility – Copyright (C) 1984 – 2001 Award Software
SDRAM CAS Latency Time
SDRAM Cycle Time Tras/TRC
SDRAM RAS-to-CAS Delay
SDRAM RAS Precharge Time
System BIOS Cacheable
Video BIOS Cacheable
CPU Latency Timer
Delayed Transaction
↑ ↓ → ← : Move Enter : Select
F5:Previous Values
SDRAM CAS Latency Time (3)
This item enables you to select the CAS latency time in
HCLKs of 2/2 or 3/3. The value is set at the factory depending
on the DRAM installed. Do not change the values in this field
unless you change the specifications of the installed DRAM or
the installed CPU.
SDRAM Cycle Time Tras/Trc (Auto)
This item sets the minimum time from activation to activation
of the same memory bank. When synchronous DRAM is i n -
stalled, the number of clock cycles of CAS latency depends
on the DRAM timing. We recommend that you leave this item
at the default value.
Advanced Chipset Features
[3]
[Auto]
[Auto]
[Auto]
[Enabled]
[Enabled]
[Enabled]
[Enabled]
+/-/PU/PD:Value: F10: Save ESC: Exit
F6:Fail-Safe Defaults
46
Item Help
Menu Level
F1:General Help
F7:Optimized Defaults