Sypcr Register - HP E3456A User Manual

Emulation for the powerpc mpc500
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Chapter 3: Connecting to a Target System
Designing the Target System for an Emulation Probe/Module
MPC555 Debug Port Connector, Option 3
For maximum I/O configuration:
The E3497-66502 target interface module (TIM) requires 10k ohm
pull-up resistors on pins 1 and 6.
The E3497-66503 target interface module (TIM) has 10k ohm pull-up
resistors on pins 1 and 6.
Bit 13 of the SIUMCR (0x002fc000) is set to enable FRZ. Software must
not change this bit.
Use the following commands to configure the emulation probe/module
for this configuration:
cf proc=MPC555
cf dbgconfig=3
rst -m

SYPCR Register

SYPCR register is a write once register containing software watchdog
timers.
The cf_sypcr register default value of 0xffffff88 is loaded into SYPCR
on the reset->break (or rst -m) sequence of commands.
This disables the watchdog timer. If another value of SYPCR needs to
be loaded, change the cf_sypcr register before issuing the reset->break
sequence of commands.
The reset->run sequence does not copy cf_sypcr into the real SYPCR
on the processor which may cause debugging to be unstable.
67

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