Omron SYSMAC CPM2B Operation Manual page 44

Specifications
Item
Synchronized pulse control
Quick-response inputs
Input time constant
(ON response time = OFF
response time)
Clock function
Communications functions
Memory protection
(See notes 1 and 2.)
Memory backup
(See notes 1 and 2.)
Self-diagnostic functions
Program checks
Note
26
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With relay outputs
1 point:
A pulse output can be created by combining the high-speed counter with pulse out-
puts and multiplying the frequency of the input pulses from the high-speed counter
by a fixed factor.
(This output is possible with transistor outputs only, it cannot be used with relay out-
puts.)
4 points (Min. input pulse width: 50 µs max.) (Also used for interrupt inputs and for
interrupt inputs in counter mode.)
Can be set for all input points.
(1 ms, 2 ms, 3 ms, 5 ms, 10 ms, 20 ms, 40 ms, or 80 ms)
This constant, however, is fixed to 1 ms for 40 and 64 I/O-point Expansion I/O
Boards.
Shows the year, month, day of the week, day, hour, minute, and second.
(Backed up by the battery.)
(The clock function is available only in CPU Boards equipped with a clock.)
Built-in peripheral port:
Supports Host Link, peripheral bus, no-protocol, or Programming Console connec-
tions.
Built-in RS-232C port:
Supports Host Link, no-protocol, 1:1 PLC Link (Master/Slave), or 1:1 NT Link con-
nections.
(RS-232C communications are available only in CPU Boards equipped with an RS-
232C port.)
HR Area, AR Area, program contents, read/write DM Area contents, and counter val-
ues maintained during power interruptions.
Flash memory:
Program, read-only DM Area, and PLC Setup
Battery or capacitor backup:
The read/write DM Area, HR Area, AR Area, and counter values are backed up by a
battery.
CPU Boards with clock: Backup is approximately 5 years at 25°C.
CPU Boards without clock: Backup is approximately 5 days at 25°C.
CPU error (watchdog timer), I/O bus error, battery error, and memory error
No END instruction, programming errors (checked when operation is started)
1. The DM Area, HR Area, AR Area, and counter values are backed up by the
CPU Board's built-in battery or capacitor. If the battery or capacitor is dis-
charged, the contents of these areas will be lost and the data values will
revert to the defaults.
2. The contents of the program area, read-only DM Area (DM 6144 to
DM 6599), and PLC Setup (DM 6600 to DM 6655) are stored in flash
memory. The contents of these areas will be read from flash memory the
next time the power is turned ON, even if the backup battery or capacitor
is discharged.
When data has been changed in any of these areas, write the new values
to flash memory by switching the CPM2B to MONITOR or RUN mode, or
by turning the power OFF and then ON again.
CPU Boards
With transistor outputs
Section 2-1