Table 27
SuperSpeed USB Signal Descriptions
Signal
Pin # Description
USB_SSRX0+
C4
Additional receive signal differential pairs for the Superspeed USB data path
USB_SSRX0-
C3
USB_SSTX0+
D4
Additional transmit signal differential pairs for the Superspeed USB data path O
USB_SSTX0-
D3
USB_SSRX1+
C7
Additional receive signal differential pairs for the Superspeed USB data path
USB_SSRX1-
C6
USB_SSTX1+
D7
Additional transmit signal differential pairs for the Superspeed USB data path O
USB_SSTX1-
D6
USB_SSRX2+
C10
Additional receive signal differential pairs for the Superspeed USB data path
USB_SSRX2-
C9
USB_SSTX2+
D10
Additional transmit signal differential pairs for the Superspeed USB data path O
USB_SSTX2-
D9
USB_SSRX3+
C13
Additional receive signal differential pairs for the Superspeed USB data path
USB_SSRX3-
C12
USB_SSTX3+
D13
Additional transmit signal differential pairs for the Superspeed USB data path O
USB_SSTX3-
D12
Table 28
PCI Express Signal Descriptions (general purpose)
Signal
Pin # Description
PCIE_RX6+
C19
PCI Express channel 6, Receive Input differential pair.
PCIE_RX6-
C20
PCIE_TX6+
D19
PCI Express channel 6, Transmit Output differential pair.
PCIE_TX6-
D20
PCIE_RX7+
C22
PCI Express channel 7, Receive Input differential pair.
PCIE_RX7-
C23
PCIE_TX7+
D22
PCI Express channel 7, Transmit Output differential pair.
PCIE_TX7-
D23
Copyright © 2018 congatec AG
I/O
PU/PD Comment
I
I
O
I
I
O
I
I
O
I
I
O
I/O
PU/PD
Comment
I PCIE
Supports PCI Express Base Specification, Revision 3.0
O PCIE
Supports PCI Express Base Specification, Revision 3.0
I PCIE
Not supported in R-Series.
Supports PCI Express Base Specification, Revision 3.0
O PCIE
Not supported in R-Series.
Supports PCI Express Base Specification, Revision 3.0
TR44m17
53/65
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