NEC UPD98413 User Manual page 95

The following figure shows the functions related to the counters and the registers that implement them.
Counter
15
CSMPT or
CSMPR register
Set the bit corresponding to the desired counter to 1.
(a) Monitoring a counter
All the counters are 32 bits wide. After power-on, each counter starts counting the number of events
associated with it. A counter unit consists of a counter that actually counts the number of events and a load
register in which the counter value is stored temporarily.
1. The CPU sets the bits in the CSMPT and CSMPR register corresponding to the counter whose value is to
be obtained to 1.
2. The µ PD98413 loads the count value at the time of the counter that has been set to 1 to the load register,
and clears the counter to 0. It also clears the bits of the CSMPT and CSMPR register to 0.
3. The CPU reads the count value from the load register. The count value that has been stored to the load
register is retained until a new value is loaded by the CAMPR register.
4. If the counter will be overflow, the counter start counting from 0 again, and the corresponding bit of the
registers is set to 1 to report the overflow to the CPU.
CHAPTER 3 FUNCTIONAL OUTLINE
Figure 3-28. Performance Counter Related Register
31
0
1
31
The CPU reads the count value.
PRELIMINARY
16 15
Counter
Reset the counter when loading.
Load
16 15
Load register
NEC confidential and Proprietary
0
0
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