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CHAPTER 6 JTAG BOUNDARY SCAN
(13) Exit1-IR
This is a temporary controller state. If the JMS pin signal is held high at the rising edge of the JCK pin signal, the TAP
controller enters the Update-IR state. This ends the scan process.
If the JMS pin signal is held low at the rising edge of the JCK pin, the TAP controller enters the Pause-IR state.
Both the bypass register and boundary scan register selected by the current instruction retain their states without
change.
While the TAP controller is in this state, the instruction does not change.
(14) Pause-IR
In this controller state, shift of the instruction register is temporarily stopped. The bypass register and boundary scan
register selected by the current instruction hold the previous state without change.
While the TAP controller is in this state, the instruction does not change. The instruction register holds the current
state.
While the JMS pin signal is low, the TAP controller remains in this state. If the JMS pin signal is held high at the rising
edge of the JCK pin signal, the TAP controller enters the Exit2-IR state.
(15) Exit2-IR
This is a temporary controller state. If the JMS pin signal is held high at the rising edge of the JCK pin signal, the TAP
controller enters the Update-IR state. This ends the scan process.
If the JMS pin signal is held low at the rising edge of the JCK pin signal, the TAP controller enters the Shift-IR state.
Both the bypass register and boundary scan register selected by the current instruction retain their states without
change.
While the TAP controller is in this state, or while the instruction register holds the current state, the instruction does
not change.
(16) Update-IR
In this controller state, the instruction shifted to the instruction register is latched to the parallel output latch from the
shift register path at the falling edge of the JCK pin signal. Once a new instruction has been latched, it is used as the
current instruction.
The bypass register or boundary scan register selected by the current instruction holds the previous state.
If the JMS pin signal is held high at the rising edge of the JCK pin signal while the TAP controller is in this state, the
TAP controller enters the Select-DR-Scan state.
If the JMS pin signal is held low at the rising edge of the JCK pin signal, the TAP controller enters the Run-Test/Idle
state.
The Pause-DR controller state in (8) and Pause-IR controller state in (14) temporarily stop shifting of data in the
bypass register, boundary scan register, or instruction register.
312
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