Parity; Atm Interface Error Detection - NEC UPD98413 User Manual

4.2.5 Parity

The µPD98413 supports a parity signal for the transmit and receive interface.
(1) Transmit parity
At the transmit side of the ATM interface, the µPD98413 checks a parity input by TXPRTY while TXENB_B is
asserted. If a parity error is detected, the µPD98413 indicates the error by the APIET register.
The µPD98413 supports both odd and even parity by setting the MDAPIT register. The default mode is odd.
(2) Receive parity
At the receive side of the ATM interface, the µPD98413 always generates a parity over RXDATA[31:0] and
outputs by RXPRTY.
The µPD98413 supports both odd and even parity by setting the MDAPIR register. The default mode is odd.

4.2.6 ATM Interface Error Detection

The µPD98413 can detect some errors in the ATM interface and indicates the error by the register.
(1) Transmit error
At the transmit side of the ATM interface, the µPD98413 detects the following errors and indicates the error by
the APIET register.
- Parity error (UTOPIA Interface)
The µPD98413 checks a parity input by TXPRTY while TXENB_B is asserted. If a parity error is detected, the
µPD98413 indicates the error by the APIET register.
- Parity error (Transmit FIFO)
The µPD98413 is generate the parity when transmit cell is stored in the transmit FIFO, and check the parity when
transmit cell is take out from the transmit FIFO. If a parity error is detected, the µPD98413 indicate the error by
the APIET register.
- Cell Discard error
If the µPD98413 detect Cell Discard, because TXCLAV is ignored and transmit FIFO is overflow occurred, the
µPD98413 indicate the error by the APIET register.
- TXENB_B and TSOC error
If the µPD98413 detect that TXENB_B is deasserted or TSOC is asserted while a cell transfer, the µPD98413
indicate the error by the APIET register.
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CHAPTER 4 INTERFACES
PRELIMINARY
NEC confidential and Proprietary