Digi ConnectCore 6UL Hardware Design Manuallines page 11

Schematics design checklist
☑
Item
2. Bluetooth
UART
3. Not
supported
functionality
4. External
antenna
CPU control lines
1. POR_B
2. ONOFF
3. PWR_ON
ConnectCore 6UL Hardware Design Guidelines
Description
The UART1 port of the CPU is used internally in the SOM for Bluetooth
connectivity. The following pads must be left unconnected to preserve
this Bluetooth functionality:
D17 (BT_UART1_TX)
l
D16 (BT_UART1_CTS#)
l
D18 (VT_UART1_RX)
l
D19 (BT_UART1_RTS#)
l
This applies only to Wireless variants of the SOM. In non-wireless variants,
the UART1 bus is available.
Functionality associated with the following pads is not currently
supported:
B17: WLAN_RF_KILL#
l
B18: BT_RF_KILL#
l
B19: WLAN_LED
l
B20: BT_LED
l
See RF guidelines.
POR_B is the reset line of the CPU. It is managed internally. It can be
used as an output for managing (resetting) external circuitry of the
carrier board, but it must never be driven as an input.
Even though this signal is not used externally, it may be useful to have it
accessible for debugging (test point).
By default, let this pad unconnected.
Similar as the POR_B signal, this line is driven internally in the SOM. It is
the PMIC ON/OFF signal. It can be used externally for managing external
circuitry but must never be driven as an input.
Although this signal is not used externally, it may be helpful to leave it
accessible for debugging (test points).
Naming and signal conventions
11