Digi ConnectCore 6UL Hardware Design Manuallines page 10

Schematics design checklist
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Item
2. GPIO5_03
NAND
1. NAND signals The following pads, which are used internally, must be left unconnected if
Wireless and Bluetooth
1. Wireless
SDIO
ConnectCore 6UL Hardware Design Guidelines
Description
GPIO5_03 (pad V15) is not supported.
you want to use the on-module NAND flash memory:
B10 (NAND_CE#)
l
B8 (NAND_CLE)
l
B9 (NAND_ALE)
l
B11 (NAND_WE#)
l
C9 (NAND_RE#)
l
C10 (NAND_WP#)
l
D11 (NAND_READY#)
l
C6 (NAND_DATA0)
l
C7 (NAND_DATA1)
l
C8 (NAND_DATA2)
l
M3 (NAND_DATA3)
l
D6 (NAND_DATA4)
l
N2 (NAND_DATA5)
l
R2 (NAND_DATA6)
l
C15 (NAND_DATA7)
l
The SDIO1 interface of the CPU is used internally in the SOM for the
wireless connectivity. The following pads must be left unconnected to
preserve this wireless functionality:
K19 (WLAN_SD1_CLK)
l
L19 (WLAN_SD1_CMD)
l
M19 (WLAN_SD1_DATA0)
l
L20 (WLAN_SD1_DATA1)
l
K20 (WLAN_SD1_DATA2)
l
M20 (WLAN_SD1_DATA3)
l
This applies only to Wireless variants of the SOM. In non-wireless variants,
the SDIO1 bus is available.
Naming and signal conventions
10