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Summary of Contents for ABACO VMICPCI-7055
- Page 1 Artisan Technology Group is your source for quality new and certified-used/pre-owned equipment SERVICE CENTER REPAIRS WE BUY USED EQUIPMENT • FAST SHIPPING AND DELIVERY Experienced engineers and technicians on staff Sell your excess, underutilized, and idle used equipment at our full-service, in-house repair center We also offer credit for buy-backs and trade-ins •...
- Page 2 Hardware Reference Manual VMICPCI-7055*/CPCI-7055RC* ® ® PowerPC -Based CompactPCI Single Board Computer T H E C P C I - 7 0 5 5 R C I S D E S I G N E D T O M E E T T H E E U R O P E A N U N I O N ( E U ) RESTRICTIONS OF HAZARDOUS SUBSTANCE (RoHS) DIRECTIVE (2015/863) CURRENT REVISION.
- Page 3 WEEE is processed in accordance with the requirements of the WEEE Directive. Abaco Systems will evaluate requests to take back products purchased by our customers before August 13, 2005 on a case-by-case basis. A WEEE management fee may apply.
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Page 4: About This Manual
About This Manual Conventions Notices This manual may use the following types of notice: WARNING Warnings alert you to the risk of severe personal injury. CAUTION Cautions alert you to system danger or loss of data. NOTE Notes call attention to important features or instructions. Tips give guidance on procedures that may be tackled in a number of ways. -
Page 5: Further Information
Abaco Website You can find information regarding Abaco products on the following website: LINK https://www.abaco.com Abaco Documents This document is distributed via the Abaco website. You may register for access to manuals via the website. LINK https://www.abaco.com/download/cpci-7055cpci-7055rc-hardware-reference-manual Third-party Documents ANSI/VITA Standards LINK http://www.vita.com... -
Page 6: Technical Support Contact Information
You can find technical assistance contact details on the website Support page. LINK https://www.abaco.com/support Abaco will log your query in the Technical Support database and allocate it a unique Case number for use in any future correspondence. Alternatively, you may also contact Abaco’s Technical Support via: LINK support@abaco.com... -
Page 7: Compliance Information
Compliance Information This chapter provides the applicable information regarding regulatory compliance for the VMICPCI-7055/CPCI-7055RC. Abaco’s VMICPCI-7055/CPCI-7055RC has been evaluated to and has met the requirements for compliance to the following standards: International Compliance • EN55022:1998/CISPR 22:1997 • IEC61000-4-2 • IEC61000-4-3 •... -
Page 8: Canadian Regulations
Canadian Regulations The VMICPCI-7055/CPCI-7055RC Class A digital apparatus complies with Canadian ICES-003. NOTE Any equipment tested and found compliant with FCC Part 15 for unintentional radiators or EN55022 (previously CISPR 22) satisfy ICES-003. -
Page 9: Table Of Contents
A.4 J5 Connector Pinout ..............43 8 VMICPCI-7055/CPCI-7055RC Hardware Reference Manual... - Page 10 A.5 Ethernet Connector LAN0 (J28) and Pinout ..........44 A.6 Serial Connector COM0 (J29) and Pinout .
- Page 11 Table B-21 NetFn 0x32, Cmd 0x80 ..............68 10 VMICPCI-7055/CPCI-7055RC Hardware Reference Manual...
- Page 12 Figure 1 VMICPCI-7055/CPCI-7055RC Block Diagram ..........15 Figure 1-1 VMICPCI-7055/CPCI-7055RC PMC Sites and Jumper Locations ......19 Figure 1-2 COP Interface .
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Page 13: Overview
• Software-selectable Watchdog Timer with reset Additionally, the VMICPCI-7055/CPCI-7055RC offer two PMC expansion sites with front panel access and I/O routing to the J5 connector of the CompactPCI backplane. The VMICPCI-7055/CPCI-7055RC are capable of executing many of ® ® today’s embedded operating systems such as VxWorks or Linux . -
Page 14: Powerpc Risc Microprocessor
CompactPCI chassis slot is desired. PowerPC RISC Microprocessor The microprocessor used on the VMICPCI-7055/CPCI-7055RC is a 32-bit PowerPC 750GX architecture in a 0.13 micron CMOS technology with six levels of copper interconnect. The performance enhancements included in the microprocessor are: •... -
Page 15: Marvell Discovery Iii (Mv64460) Chipset
(MACs), up to two PCI-X interfaces and DDR memory support. In addition, the Discovery III device offers an integrated 2 MBit of cache coherent SRAM that resides on the processor interface unit to provide low latency storage for descriptors and packets. 14 VMICPCI-7055/CPCI-7055RC Hardware Reference Manual Publication No. 500-657055-000 Rev. G... -
Page 16: Figure 1 Vmicpci-7055/Cpci-7055Rc Block Diagram
Figure 1 VMICPCI-7055/CPCI-7055RC Block Diagram VMICPCI-7055/ CPCI-7055RC Two Single or One Double Wide PMC Site 64-bit/100 MHz PCI-X PMC Site 1 I/O - 64-bit PMC Site 1 64-bit/100 MHz PCI-X PMC Site 2 64-bit/100 MHz PCI-X Bus JTAG/ IBM 750GX... -
Page 17: References
445 Hoes Lanes, P.O. Box 1331 Piscataway, NJ 08855-1331 PMC Specification, P1386.1/Draft 2.0 from: IEEE Standards Department Copyrights and Permissions Piscataway, NJ 08855-1331 445 Hoes Lanes, P.O. Box 1331 Piscataway, NJ 08855-1331, USA 16 VMICPCI-7055/CPCI-7055RC Hardware Reference Manual Publication No. 500-657055-000 Rev. G... - Page 18 For a detailed description and specification of the CompactPCI bus, please refer to: CompactPCI Specification PICMG 2.0 R3.0 IEEE Standards Department PCI Industrial Computer Manufacturers’ Group 301 Edgewater Place Suite 220 Wakefield, MA 01880 (617) 224-1100 (617) 224-1239 (FAX) www.picmg.org Packet Switching Backplane Specification PICMG 2.16 R1.0 PCI Industrial Computer Manufacturers’...
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Page 19: Handling And Installation
SBC are illustrated in Figure 1-1 on page 19. The definitions of the SBC board jumpers and connectors are included in Table 1-1 through Table 1-3. Please note that the VMICPCI-7055/CPCI-7055RC offer two PMC sites designated PMC #1 and PMC #2 as shown in Figure 1-1 on page 19. -
Page 20: Figure 1-1 Vmicpci-7055/Cpci-7055Rc Pmc Sites And Jumper Locations
Figure 1-1 VMICPCI-7055/CPCI-7055RC PMC Sites and Jumper Locations PMC 1 PMC 2 Publication No. 500-657055-000 Rev. G Handling and Installation 19... -
Page 21: Table 1-1 Board Connectors, Headers, Switches And Jumpers
Enable CompactPCI Bridge Mode Default: Normal operation mode. Blade Mode: In this mode the VMICPCI-7055/CPCI-7055RC will turn off the bridge to the backplane. This allows the SBC to be inserted into any slot on the backplane, with or without a system controller. If the SBC is inserted in a chassis with a system controller the CPCI_RESET# will be ignored. -
Page 22: Cop/Ice/Emulator
1.4 COP/ICE/Emulator To use the COP/ICE/Emulator, there are two headers on the board that look similar. The location of both headers is shown in the diagram on the following page. It will be required for the user to access both headers (E5 and E18) in order to utilize the COP interface. - Page 23 E5 (COP Header) E18 (JTAG Header) 22 VMICPCI-7055/CPCI-7055RC Hardware Reference Manual Publication No. 500-657055-000 Rev. G...
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Page 24: Switch S1
Figure 1-3 Location of Switch S1 NOTE To configure the serial ports to loopback mode, S1 on the VMICPCI-7055/CPCI-7055RC will need pins 6 and 8 (relating to COM1 and COM2 respectively) placed in the ON position when used with the VMIACC- 7055/ACC-7055RC Rear Transition Modules (RTMs). -
Page 25: Installation
The following steps describe the recommended method for installation and powerup of the VMICPCI-7055/CPCI-7055RC: 1. If a PMC is to be used, install it on the VMICPCI-7055/CPCI-7055RC prior to board installation (as shown in Figure 1-5 on page 26). Refer to the Product Manual for the PMC module for configuration and setup. -
Page 26: Installing Pmcs
1.7 Installing PMCs 1.7.1 PMC Site (VIO) VIO is the I/O voltage used for PCI bus termination. The PCI bus interface requires strong parallel (pull-up) termination. Initially, the voltage for the pull- ups was +5 V. Over time, with the need for power reduction and higher speeds, +3.3 V devices became prevalent. -
Page 27: Figure 1-5 Installing A Pmc On The Vmicpci-7055/Cpci-7055Rc
Figure 1-5 Installing a PMC on the VMICPCI-7055/CPCI-7055RC CAUTION When installing the keypins on the two PMC sites, the two keypins MUST be installed for the same voltage level (i.e., either in the 5 V position or in the 3.3 V position). This is due to the keypins being on the same bus, if installed incorrectly this could cause damage to the board. -
Page 28: Figure 1-6 Vmicpci-7055/Cpci-7055Rc Pmc Backside Mounting
Figure 1-6 VMICPCI-7055/CPCI-7055RC PMC Backside Mounting Publication No. 500-657055-000 Rev. G Handling and Installation 27... -
Page 29: Front/Rear Panel Connectors
1.8 Front/Rear Panel Connectors The VMICPCI-7055/CPCI-7055RC provide front panel access for both PMC expansion sites, one Gigabit Ethernet port, one serial port, the manual reset switch and the status LEDs. A drawing of the VMICPCI-7055/CPCI-7055RC front panels are shown in Figure 1-7. -
Page 30: Led Definition
1.9 LED Definition Figure 1-7 Front Panel LED Definitions Ethernet Ports (1, 2 and 0) Status Indicators LAN2 Indicates Link Speed. LED off, indicates 10Base-T, Yellow LED - Activity LAN1 Yellow LED, indicates 100Base-TX, Green LED - Link Green LED, indicates 1000Base-T PMC Site #1 LAN0 LAN0: Yellow LED... -
Page 31: Rs232 Serial Port (Com0)
1.10 RS232 Serial Port (COM0) The serial port can be used to control, monitor and set up the VMICPCI-7055/ ® CPCI-7055RC. Using a PC as a remote terminal with a Windows -based OS, go to Accessories, then to Hyperterminal and click on Hyperterminal. When using a Linux-based OS, go to the root directory, at the command prompt and type in Minicom. -
Page 32: Figure 1-9 Hyperterminal New Connection Window
Figure 1-9 Hyperterminal New Connection Window 2. Select the COM port you will be using. After selecting the COM port click Publication No. 500-657055-000 Rev. G Handling and Installation 31... -
Page 33: Figure 1-10 Com Port Window
Figure 1-10 COM Port Window 7055 COM0 3. The COM port properties window will appear. Select the Baud rate (bits per second). The default Baud rate for the VMICPCI-7055/CPCI-7055RC is 9600. Click OK. Figure 1-11 COM1 Properties Window Baud Rate... -
Page 34: Using The Serial Port (Debug)
1.11 Using the Serial Port (Debug) The RS232 serial port is used to monitor and control the VMICPCI-7055/ CPCI-7055RC. The VMICPCI-7055/CPCI-7055RC can be cabled to a standard PC with an available serial port. See Figure 1-12 below for an example of connecting the VMICPCI-7055/CPCI-7055RC with a PC using the RS232 serial port and cable. -
Page 35: Standard Features
(such as serial ports, IDE interface and Ethernet controller) are all memory mapped the same as similarly equipped desktop systems, ensuring compatibility with modern operating systems. The following sections describe the standard features of the VMICPCI-7055/ CPCI-7055RC. 2.1 CPU The VMICPCI-7055/CPCI-7055RC CPU is factory populated with an IBM PowerPC processor. -
Page 36: Pci Device Interrupt Map
CompactPCI J5 backplane connector to an optional RTM that terminates into a standard 40-pin header. This channel can support a master and slave drive. The IDE interface on the VMICPCI-7055/CPCI-7055RC supports Ultra ATA/33, Ultra ATA/66 and Ultra ATA/100 drives and automatically determines the proper operating mode based on the type of drive used. -
Page 37: Ethernet Controller
Ethernet activity is monitored on the front panel LEDs by a blinking yellow LED. The yellow LED will be on continuously when the Ethernet port is linked but with no activity. NOTE If the PICMG 2.16 option is available on the VMICPCI-7055/CPCI-7055RC, then the Gigabit Ethernet can not be used with the VMIACC-7055/ACC-7055RC RTMs. 36 VMICPCI-7055/CPCI-7055RC Hardware Reference Manual... -
Page 38: Embedded Pc/Rtos Features
3 • Embedded PC/RTOS Features The VMICPCI-7055/CPCI-7055RC feature additional capabilities beyond those of a typical desktop computer system. The unit provides standard general-purpose timers along with a programmable Watchdog Timer for synchronizing and controlling multiple events in embedded applications. The VMICPCI-7055/ CPCI-7055RC also provide support for a CompactFlash disk system or PICMG 2.16 Ethernet over the CompactPCI backplane or rear I/O using the... -
Page 39: Picmg 2.16 Ethernet
Ethernet channel. 3.3 PICMG 2.9 Support The VMICPCI-7055/CPCI-7055RC provide a Zircon PM peripheral management controller that supports a subset of IPMI 1.5 commands via PICMG 2.9. Refer to Appendix B for details of the IPMI capabilities of the onboard peripheral management controller. -
Page 40: A • Connectors And Pinouts
A • Connectors and Pinouts The VMICPCI-7055/CPCI-7055RC CompactPCI Universal SBCs have several connectors for their I/O ports. Wherever possible, the VMICPCI-7055/ CPCI-7055RC use connectors and pinouts typical for any desktop PC. This ensures maximum compatibility with a variety of systems. - Page 41 CPCI_AD[30] CPCI_AD[29] CPCI_AD[28] CPCI_AD[2 CPCI_REQ# CPCI_PCI_PRES CPCI_3V_C6 CPCI_CLK CPCI_AD[3 ENT# CPCI_RST# CPCI_GNT CPCI_IPMB_P CPCI_HEALTHY CPCI_VIO_C4 N/C CPCI_INTAR# CPCI_INTBR# CPCI_INTCR# CPCI_5V_ CPCI_INTD CPCI_TCK VCC_5.0E CPCI_TMS CPCI_TDI VCC_5.0E VCC_-12.0E CPCI_TRST# VCC_12.0E VCC_5.0E 40 VMICPCI-7055/CPCI-7055RC Hardware Reference Manual Publication No. 500-657055-000 Rev. G...
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Page 42: J2 Connector Pinout
A.2 J2 Connector Pinout The VMICPCI-7055/CPCI-7055RC J2 connector is a 2 mm “Hard Metric” CompactPCI connector, with five rows of 22 pins each. J2 is required for system slot SBCs. An additional external metal shield, labeled row F, is also used. This connector’s controlled impedance minimizes unwanted signal reflections. -
Page 43: J3 Connector Pinout
Row E CPCI_CLK CPCI_REQ1# CPCI_GNT1# CPCI_REQ2# * VCC_VIO - The VMICPCI-7055/CPCI-7055RC are universal VIO designs. The VMICPCI-7055/CPCI-7055RC support a 64-bit CompactPCI bus. A.3 J3 Connector Pinout The J3 connector is a five row, 19 pins each, 2 mm “Hard Metric” CompactPCI connector. -
Page 44: J5 Connector Pinout
ACC-7055RC boards can then be utilized. Although the two Gigabit Ethernet ports are available on the VMIACC-7055/ACC-7055RC, they can only be used when the VMICPCI-7055/CPCI-7055RC have a value of ‘1’ in the options’ D field, which allows for Ethernet via CompactPCI J3 (not PICMG 2.16 compatible). -
Page 45: Ethernet Connector Lan0 (J28) And Pinout
Figure A-1 Ethernet Connector and Pinout Table A-5 J28 Connector Pinout LAN0 (J28) Ethernet Connector (1000 Mbit) Signal Name MDI_0+ MDI_0- MDI_1+ MDI_1- MDI_2+ MDI_2- MDI_3+ Pin#1 Connector Opening Top View 44 VMICPCI-7055/CPCI-7055RC Hardware Reference Manual Publication No. 500-657055-000 Rev. G... -
Page 46: Serial Connector Com0 (J29) And Pinout
CONNECTOR J29 Assignment NOTE An RJ45 to DB9 adapter cable (Part Number 360-010030-002 (non-RoHS) or 42G7602-0002 (RoHS) is shipped with the VMICPCI-7055/CPCI-7055RC. The RJ45 pinout supports asynchronous RS232 mode only. Assignment Publication No. 500-657055-000 Rev. G Connectors and Pinouts 45... -
Page 47: Pmc Connectors And Pinouts
+5.0 V AD[9] +5.0 V Px_VIO AD[31] C/BE#[0] AD[28] AD[27] AD[6] AD[5] AD[25] AD[4] C/BE#[3] Px_VIO AD[3] AD[22] AD[21] AD[2] AD[1] AD[19] +5.0 V AD[0] +5.0 V Px_VIO AD[17] REQ64# 46 VMICPCI-7055/CPCI-7055RC Hardware Reference Manual Publication No. 500-657055-000 Rev. G... -
Page 48: Pmc#1 (J12) And Pmc#2 (J22) Connector And Pinout
A.7.2 PMC#1 (J12) and PMC#2 (J22) Connector and Pinout Table A-8 PMC#1 (J12) and PMC#2 (J22) Connector Pinout PMC Connector (J12/J22) PMC Connector (J12/J22) Left Side Right Side Left Side Right Side Name Name Name Name +12 V Px_VIO TRDY# +3.3 V Px_VIO STOP#... -
Page 49: Pmc#1 (J13) And Pmc#2 (J23) Connector And Pinout
21 VIO AD[56] 53 AD[35] AD[34] 23 AD[55] AD[54] 55 AD[33] 25 AD[53] 57 VIO AD[32] 27 GND AD[52] 59 N/C 29 AD[51] AD[50] 61 N/C 31 AD[49] 63 GND 48 VMICPCI-7055/CPCI-7055RC Hardware Reference Manual Publication No. 500-657055-000 Rev. G... -
Page 50: Pmc#1 (J13) And Pmc#2 (J23) Connector And Pinout
A.9 PMC#1 (J13) and PMC#2 (J23) Connector and Pinout Table A-10 PMC#1 J13 Connector Pinout PMC Connector (J13) PMC Connector (J13) Left Side Right Side Left Side Right Side Name Name Name Name 33 GND AD[48] C/BE#[7] 35 AD[47] AD[46] C/BE#[6] C/BE#[5] 37 AD[45]... -
Page 51: Pmc#1 (J14) Connector And Pinout
PMC1_IO[4 PMC1_IO[50 PMC1_IO[1 PMC1_IO[2 PMC1_IO[5 PMC1_IO[52 PMC1_IO[2 PMC1_IO[2 PMC1_IO[5 PMC1_IO[54 PMC1_IO[2 PMC1_IO[2 PMC1_IO[5 PMC1_IO[56 PMC1_IO[2 PMC1_IO[2 PMC1_IO[5 PMC1_IO[58 PMC1_IO[2 PMC1_IO[2 PMC1_IO[5 PMC1_IO[60 PMC1_IO[2 PMC1_IO[3 PMC1_IO[6 PMC1_IO[62 PMC1_IO[3 PMC1_IO[3 PMC1_IO[6 PMC1_IO[64 50 VMICPCI-7055/CPCI-7055RC Hardware Reference Manual Publication No. 500-657055-000 Rev. G... -
Page 52: B • Ipmi Firmware And Oem Extensions
IPMI is no longer supported. Older boards may have IPMI. B.1 Standard IPMI Commands The Abaco IPMI firmware implements all “Required” commands for a Peripheral Manager per the IPMI 1.5 spec, as well as some of the “Optional” commands. B.1.1 Get Device ID This command is used to retrieve the Intelligent device’s Hardware Revision, Firmware/Software... -
Page 53: Cold Reset
While there are two commands, one for a cold reset, and one for a warm reset, the firmware does not distinguish between them and always performs a cold reset. Table B-3 NetFn 0x06, Cmd 0x03 Byte Value Data Field Comments Request- data Response- Completion code data 52 VMICPCI-7055/CPCI-7055RC Hardware Reference Manual Publication No. 500-657055-000 Rev. G... -
Page 54: Get Self-Test Results
B.1.4 Get Self-Test Results This command returns the results of the Power-On Self Test. Table B-4 NetFn 0x06, Cmd 0x04 Byte Value Data Field Comments Request- data Response- Completion code data No error. All Self-Tests Passed. Self-Test not implemented in this controller. -
Page 55: Set Acpi Power State
[7] – 1b = set device power state 0b = don’t change device power state [6:0] – device power state 00h – Fully on 03h – Power off Response- Completion Code data 54 VMICPCI-7055/CPCI-7055RC Hardware Reference Manual Publication No. 500-657055-000 Rev. G... -
Page 56: Get Acpi Power State
Value Data Field Comments Request- data Response- Completion code data ACPI System Power The Abaco IPMI State subsystem does not [7] – reserved have control over the [6:0] – System power system power. state 2Ah – unknown ACPI Device Power State 00h –... -
Page 57: Get Device Guid Command
MS byte reserved time high and version time high and version MS byte time mid time mid MS byte time low time low time low time low MS byte 56 VMICPCI-7055/CPCI-7055RC Hardware Reference Manual Publication No. 500-657055-000 Rev. G... -
Page 58: Broadcast Get Device Id
B.1.8 Broadcast Get Device ID This is a broadcast version of the “Get Device ID” command that is provided for the discovery of Intelligent Devices on the IPMB. It is only specified for use on the IPMB. The response for a Broadcast ‘Get Device ID’ is the same as that returned for a ‘Get Device ID’ command. B.1.9 Master-Write-Read This command can be used for low-level I C/SMBus write, read, or write-read accesses to the IPMB or... -
Page 59: Set Event Receiver
Response- Completion code data For a list of platform events generated by the Abaco IPMI subsystem see “Platform Events” on page 65. B.1.11 Get Event Receiver This command gets the current setting for the Event Receiver slave address and LUN. -
Page 60: Get Sensor Reading
Optional for discrete condition reading sensors The Abaco IPMI subsystem contains several sensors. They provide the voltages and temperature reading of the system. The various sensor settings like threshold, hysteresis, event enable, etc., are statically configured in the Sensor Data Records. -
Page 61: Fru Inventory Area Info
FRU inventory area size in bytes, LS Byte. FRU inventory area size in bytes, MS Byte. [7:1] – reserved [0] – 0b = accessed by bytes 1b = accessed by words 60 VMICPCI-7055/CPCI-7055RC Hardware Reference Manual Publication No. 500-657055-000 Rev. G... -
Page 62: Read Fru Data
3:2+ Requested data The FRU data conforms to the IPMI FRU Information Storage Definition v 1.0 specification. All Abaco IPMI-enabled boards come with the FRU data preloaded; the specific data is documented in “FRU Data Specification” on page 64. -
Page 63: Get Sdr Repository Info
IPMB when records are being incrementally read. Table B-16 NetFn 0x0A, Cmd 0x22 Byte Value Data Field Comments Request-data Response- Completion Code. data Reservation ID, LS Byte. Reservation ID, MS Byte. 62 VMICPCI-7055/CPCI-7055RC Hardware Reference Manual Publication No. 500-657055-000 Rev. G... -
Page 64: Get Sdr Command
B.1.18 Get SDR Command This command returns the sensor record specified by ‘Record ID’. The command also accepts a ‘byte range’ specification that allows just a selected portion of the record to be retrieved. The Requester must first reserve the SDR Repository using the ‘Reserver SDR Repository’ command in order for an incremental read to an offset other than 0000h to be accepted. -
Page 65: Fru Data Specification
B.2 FRU Data Specification Abaco boards have data pre-loaded into the FRU area to provide basic information about the board. The FRU data conforms to the ‘Platform Management FRU Information Storage Definition’, Revision 1.1. Please ® refer to this document, available from Intel , for the exact meaning of the various fields. -
Page 66: Platform Events
B.3 Platform Events The Abaco IPMI subsystem contains several sensors for reading the voltages and temperature of the system. Each sensor is configured with a threshold, hysteresis, and nominal value. When the value of a sensor crosses a threshold, a platform event is sent to the “Event Receiver”. -
Page 67: Chassis Control
B.4 Chassis Control All Abaco IPMI-enabled boards include extra circuitry to enable the IPMI controller to monitor and control certain CompactPCI signals. These functions are controlled by sending IPMI packets from the VMICPCI-7055/CPCI-7055RC processor cards to the controller. B.4.1 Get Geographical Address This command returns the Slave Address based on the Geographical Slot the board is inserted into. -
Page 68: Bmc Functions
The Abaco IPMI firmware can perform some of the functions of a Baseboard Management Controller. The firmware can send IPMI commands to other targets on the IPMB on behalf of the VMICPCI-7055/ CPCI-7055RC and return the responses to the VMICPCI-7055/CPCI-7055RC. It can also forward any platform events it receives to the VMICPCI-7055/CPCI-7055RC. -
Page 69: Set Platform Event Forwarding Address
If the forwarding address is 0 (by default, or deliberately set), events will not be forwarded. In all cases, any Platform Events will be acknowledged back to the original sender. The VMICPCI-7055/ CPCI-7055RC should not acknowledge the forwarded event back to the IPMI controller. - Page 70 © 2018 Abaco Systems, Inc. All rights reserved. Information Centers For more information, please visit the * indicates a trademark of Abaco Systems, Inc. and/or its affiliates. All other Abaco Systems website at: Americas: trademarks are the property of their 1-866-652-2226 (866-OK-ABACO) respective owners.
- Page 71 Artisan Technology Group is your source for quality new and certified-used/pre-owned equipment SERVICE CENTER REPAIRS WE BUY USED EQUIPMENT • FAST SHIPPING AND DELIVERY Experienced engineers and technicians on staff Sell your excess, underutilized, and idle used equipment at our full-service, in-house repair center We also offer credit for buy-backs and trade-ins •...