Example Of Setting X1 Oscillation Clock - Renesas RL78/I1A User Manual

RL78/I1A

5.6.2 Example of setting X1 oscillation clock

After a reset release, the CPU/peripheral hardware clock (f
oscillator clock. To subsequently change the clock to the X1 oscillation clock, set the oscillator and start oscillation by
using the oscillation stabilization time select register (OSTS), clock operation mode control register (CMC), clock operation
status control register (CSC) and wait for oscillation to stabilize by using the oscillation stabilization time counter status
register (OSTC). After the oscillation stabilizes, set the X1 oscillation clock to f
register (CKC).
[Register settings] Set the register in the order of <1> to <5> below.
<1> To operate the X1 oscillator, set (1) the OSCSEL bit of the CMC register, and when f
bit.
7
EXCLK
CMC
0
AMPH bit: Set this bit to 0 if the X1 oscillation clock is 10 MHz or less.
<2> Using the OSTS register, select the oscillation stabilization time of the X1 oscillator at releasing of the STOP
mode.
Example: Setting values when a wait of at least 102
7
OSTS
0
<3> Clear (0) the MSTOP bit of the CSC register to start oscillating the X1 oscillator.
7
MSTOP
CSC
0
<4> Use the OSTC register to wait for oscillation of the X1 oscillator to stabilize.
Example: Wait until the bits reach the following values when a wait of at least 102
resonator.
7
MOST8
OSTC
1
<5> Use the MCM0 bit of the CKC register to specify the X1 oscillation clock as the CPU/peripheral hardware clock.
7
CLS
CKC
0
Caution Set the HOCODIV register within the operable voltage range of the flash operation mode set in the
option byte (000C2H) before and after the frequency change.
Option Byte (000C2H)
CMODE1
1
1
R01UH0169EJ0320 Rev.3.20
Sep 29, 2017
6 5
OSCSEL EXCLKS
1 0
6 5
0 0
6 5
XTSTOP
1 0
6 5
MOST9 MOST10
1 1
6 5
CSS MCS
0 0
Value
Flash Operation Mode
CMODE0
0 LS (low-speed main) mode
1 HS (high-speed main) mode
CHAPTER 5 CLOCK GENERATOR
) always starts operating with the high-speed on-chip
CLK
4 3
OSCSELS AMPHS1
0 0

s is set based on a 10 MHz resonator.
4 3
OSTS2
0 0
4 3
0 0
4 3
MOST11 MOST13 MOST15
0 0
4 3
MCM0
1 0
Operating
Frequency Range
1 to 8 MHz
1 to 32 MHz
by using the system clock control
CLK
> 10 MH, set (1) the AMPH
X
2 1
AMPHS0 AMPH
0 0 0/1
2 1
OSTS1 OSTS0
0 1
2 1
HIOSTOP
0 0

s is set based on a 10 MHz
2 1
MOST17 MOST18
0 0
2 1
0 0
Operating Voltage
Range
2.7 to 5.5 V
0
0
0
0
0
0
0
0
0
148