Low Voltage Reset – LVR
The microcontroller contains a low voltage reset circuit in order to monitor the supply voltage of
the device. This voltage is fixed at 2.1V (V
range of 0.9V~V
the device internally.
The LVR includes the following specifications: For a valid LVR signal, a low voltage, i.e., a voltage
in the range between 0.9V~V
characteristics. If the low voltage state does not exceed t
perform a reset function. Note that the LVR function will automatically be disabled when the MCU
enters the Power Down Mode.
Watchdog Time-out Reset during Normal Operation
The Watchdog time-out Reset during normal operation is the same as a hardware RES pin reset
except that the Watchdog time-out flag TO will be set to "1".
Watchdog Time-out Reset during Sleep Mode
The Watchdog time-out Reset during Sleep Mode is a little different from other kinds of reset. Most
of the conditions remain unchanged except that the Program Counter and the Stack Pointer will be
cleared to "0" and the TO flag will be set to "1". Refer to the A.C. Characteristics for t
Note: t
Reset Initial Conditions
The different types of reset described affect the reset flags in different ways. These flags, known
as PDF and TO are located in the status register and are controlled by various microcontroller
operations, such as the Sleep Mode function or Watchdog Timer. The reset flags are shown in the
table:
TO
0
�
1
1
Rev. 1.00
Cost-Effective A/D 8-bit OTP MCU
). If the supply voltage of the device drops to within a
LVR
such as might occur when changing a battery, the LVR will automatically reset
LVR
must exist for greater than the value t
LVR
L V R
I n t e r n a l R e s e t
Note: t
is power-on delay, typical time=50ms
RSTD
Low Voltage Reset Timing Chart
W D T T i m e - o u t
I n t e r n a l R e s e t
Note: t
is power-on delay, typical time=50ms
RSTD
WDT Time-out Reset during Normal Operation Timing Chart
W D T T i m e - o u t
I n t e r n a l R e s e t
is 16 clock cycles for the system clock source is provided by HIRC.
SST
WDT Time-out Reset during Sleep Timing Chart
PDF
0
Power-on reset
�
RES or LVR reset d�ring NORMAL Mode operation
�
WDT time-o�t reset d�ring NORMAL Mode operation
1
WDT time-o�t reset d�ring Sleep Mode operation
�8
HT46R003B
specified in the A.C.
LVR
, the LVR will ignore it and will not
LVR
t
t
R S T D +
S S T
t
t
R S T D +
S S T
t
S S T
RESET Conditions
Note: "�" stands for �nchanged
details.
SST
��ne 1�� �01�
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