Watchdog Timer
The Watchdog Timer, also known as the WDT, is provided to prevent program malfunctions or
sequences from jumping to unknown locations, due to certain uncontrollable external events such as
electrical noise.
Watchdog Timer Clock Source
The Watchdog Timer clock source is provided by the LIRC oscillator, the system clock f
its division clock f
clock is then subdivided by a ratio of 2
using the WS2~WS0 bits in the WDTS register. The LIRC internal oscillator has an approximate
period frequency of 12kHz at a supply voltage of 5V. However, it should be noted that this specified
internal clock period can vary with V
Watchdog Timer Control Registers
WDTS Register
Bit
7
Name
—
R/W
—
POR
—
Bit 7~3
Unimplemented, read as "0"
WS2~WS0: WDT Time-out period selection
Bit 2~0
000: 2
001: 2
010: 2
011: 2
100: 2
101: 2
110: 2
111: 2
These three bits determine the division ratio of the Watchdog Timer source clock,
which in turn determines the timeout period.
WDTC Register
Bit
7
Name
WDTCLS1 WDTCLS0 WDTEN5 WDTEN� WDTEN3 WDTEN� WDTEN1 WDTEN0
R/W
R/W
POR
0
WDTCLS1~WDTCLS0: WDT/Timer/PWM/Time base clock source
Bit 7~6
00: f
01: f
10: f
11: f
WDTEN5~WDTEN0: WDT enable control
Bit 5~0
000000: Enable
101101: Disable
Other values: MCU reset
When these bits are changed by the environmental noise to reset the microcontroller,
the reset operation will be activated after 2~3 LIRC clock cycles.
Rev. 1.00
Cost-Effective A/D 8-bit OTP MCU
/4, which are sourced from the HIRC oscillator. The Watchdog Timer source
SYS
to 2
to give longer timeouts, the actual value being chosen
8
15
, temperature and process variations.
DD
6
5
4
—
—
—
—
—
—
—
—
—
/f
8
S
/f
8
S
/f
10
S
/f
11
S
/f
12
S
/f
13
S
/f
14
S
/f
15
S
6
5
R/W
R/W
R/W
0
0
LIRC
/4
SYS
SYS
SYS
��
3
2
—
WS�
—
R/W
—
1
4
3
2
R/W
R/W
0
0
0
HT46R003B
and
SYS
1
0
WS1
WS0
R/W
R/W
1
1
1
0
R/W
R/W
0
0
��ne 1�� �01�
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