I/O Signals For Handshake With Cpu Module And Buffer Memory - Mitsubishi Electric MELSEC iQ-R Series User Manual

19.3
I/O Signals for Handshake with CPU Module and
Buffer Memory
This section explains the I/O signals for handshake and the buffer memories used when mode switching is performed.
I/O signals for handshake with CPU module
Type I/O signal
CH1
Mode X6
switching
Y2
The following signals can also be used as I/O signals, in addition to the above.
• Module READY signal (X1E): Turns ON when C24 can be accessed from the CPU module.
• Watchdog timer error signal (X(n+1)F): Turns ON when C24 does not operate normally.
• 'CH1 Error occurrence' (XE): Turns ON when error occurred on the CH1 side.
• 'CH2 Error occurrence' (XF): Turns ON when error occurred on the CH2 side.
For details on the CPU module I/O signals, refer to the following section.
(Page 493 Input/Output Signal List)
Buffer memory
Address (DEC
(HEX))
CH1 CH2
144 (90H) 304 (130H)
145 (91H) 305 (131H)
515 (203H)
19 SWITCHING THE MODE AFTER STARTING
380

19.3 I/O Signals for Handshake with CPU Module and Buffer Memory

Signal name
CH2
XD Switching mode
Y9 Mode switching
request
Name
For designation of Switching mode No. designation (Page
mode switching 381 Switching mode No. designation
(Un\G144/304))
Transmission specifications after switching
designation(Page 381 Transmission
specifications after switching designation
(Un\G145/305))
For confirmation of Parameter setting error and mode switching
parameter setting error status
and mode switching
Device turned ON/ Timing
OFF
CPU C24


X6/XD
Y2/Y9
Setting value/Stored value
0001H: MC protocol (Format 1)
to
00FFH: MELSOFT connection
0000H : Match the setting in MELSOFT.
8000H to 8FFFH: Match the setting to that of this area
0 : No error
Other than 0: Parameter setting error, mode switching
error
(Page 473 Error Code List)
Complete
(Switching)