Mitsubishi Electric MELSEC iQ-R Series User Manual page 515

Address Purpose
Dec (Hex)
CH1 CH2
8425 to 8681 to Use prohibited
8458 8703
(20E9H (21E9H
to to
210AH) 21FFH)
8704 to 8960 to Use prohibited
8707 8963
(2200H to (2300H to
2203H) 2303H)
8708 8964 Programmable
(2204H) (2304H) controller CPU
monitoring
function
8709 8965
(2205H) (2305H)
8710 8966
(2206H) (2306H)
8711 8967
(2207H) (2307H)
8712 to 8968 to Use prohibited
8948 9215
(2208H to (2308H to
22F4H) 23FFH)
8949 to 8954 Use prohibited
(22F5H to 22FAH)
8955 For the remote
(22FBH) password
function
8956
(22FCH)
8957, 8958 Use prohibited
(22FDH, 22FEH)
8959 For the remote
(22FFH) password
function
9216 Use prohibited
(2400H)
9217 For storage of
(2401H) number of flash
ROM write
9218 to 9727 Use prohibited
(2402H to 25FFH)
Name
System area
System area
Programmable controller CPU monitoring
function operation status
0: Not executed
1: Wait for programmable controller CPU
monitoring time
2: Accessing programmable controller CPU
3: Sending monitoring results
Programmable controller CPU monitoring
function execution result (current)
0: Normal completion Other than 0: Abnormal
completion (error code)
Programmable controller CPU monitoring
function number of transmission
0: Not executed 1 or more: Number of
transmissions
Monitoring condition attained block No.
0 : No block of which monitoring condition is
satisfied
1 to 10: Registration order of word/bit block
(nth)
4096 : CPU abnormal monitoring block
The latest block No. for which monitoring
condition is satisfied is stored.
System area
System area
Accumulated count of unlock process normal
completion
0 or more: Accumulated count of normal
completion
Accumulated count of unlock process abnormal
completion
0 or more: Accumulated count of abnormal
completion
System area
Accumulated count of lock process by line
disconnection
0 or more: Accumulated count of lock process
by line disconnection
System area
Flash ROM write count
0 to 1000: Number of rewriting
System area
Defaul Protocol
t value
MC Non Bi Pd



0 R
0
0
0


0 RW 
0


0 R W

0 R

APPENDICES APPENDIX
Appendix 3 Buffer Memory
Reference
Page 138 Settings for
Using the
Programmable
Controller CPU
Monitoring Function
A
Page 161 Buffer
memory
Page 161 Buffer
memory

513