SiTime SiT6502EB User Manual

SiT6502EB Evaluation Board (EVB) HW User Manual
Contents
1 Introduction ............................................................................................................................................. 1
2 SiT6502EB Features .................................................................................................................................. 1
3 SiT6502EB Support Collateral .................................................................................................................. 2
4 Connectors Descriptions .......................................................................................................................... 2
5 Test Points Descriptions ........................................................................................................................... 3
6 Jumpers Default List ................................................................................................................................. 4
7 Status LEDs ............................................................................................................................................... 5
8 SiT6502EB Power Supplying ..................................................................................................................... 6
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9 I C/SPI Mode Connection ......................................................................................................................... 8
10 Clock Inputs .............................................................................................................................................. 8
11 Clock Outputs ........................................................................................................................................... 9
11.1 Output Differential Termination .................................................................................................... 10
11.1.1 LVDS, CML ............................................................................................................................ 10
11.1.2 LVPECL ................................................................................................................................. 11
11.1.3 HCSL ..................................................................................................................................... 11
12 Quick Start .............................................................................................................................................. 11
Appendix A: EVB Schematic Diagrams ........................................................................................................ 13
Appendix B: EVB Top View .......................................................................................................................... 32
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Introduction

The SiT6502EB Evaluation Board (EVB) is designed evaluating the programmable jitter attenuating clock
synthesizer SiT95147 device.
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SiT6502EB Features

- Powered from USB port or external power supply
- Programmable VDDO supplies for each of the 8 outputs selectable from 3.3, 2.5, or 1.8V
- Status LEDs for power supplies status signals of SiT6502EB
- Each of the 8 outputs accessible via edge mount
- High bandwidth SMA connectors
- 4 pairs of edge mount SMA connectors for feeding external differential or single-ended clocks
- Supports full configuration flexibility of the device via standard I
Windows hosted Time Master for Clocks GUI
SiT6502EB HW UM Preliminary Rev 1.0 Page 1 of 33
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C or SPI interface with a
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