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Contents
1 Introduction ............................................................................................................................................. 1
2 Board Overview ........................................................................................................................................ 1
3 Standard Shipping Configurations ........................................................................................................... 4
3.1 LVPECL, FlexSwing and LVDS Shipping Configuration ...................................................................... 4
3.2 HCSL Shipping Configuration ........................................................................................................... 5
4 Phase Noise and Phase Jitter Measurement ........................................................................................... 7
Appendix A - Generic EVB Schematic* ......................................................................................................... 8
Appendix B - Connector Ordering Codes ..................................................................................................... 9
Appendix C - Board View ............................................................................................................................ 10
1

Introduction

The SiT6760EB evaluation board (EVB) is a simple and easy to use tool that enables component-level
performance evaluation of SiTime SiT9501 and SiT937x differential oscillators. The EVB is shipped to
customers with the differential oscillator in 3.2 mm x 2.5 mm 6-pin QFN package mounted on the board.
The oscillator is factory pre-configured according to the ordering part number.
The SiT6760EB supports all output signal options of SiTime SiT9501 and SiT937x differential oscillators,
such as LVPECL, LVDS, HCSL, low-power HCSL and FlexSwing™. For more information about specific
signaling options please refer to the product datasheet.
2

Board Overview

The SiT6760EB EVB is a 2 x 2 inch PCB
differential oscillator. The board contains input and output connectors described in
supply bypass network (on the back side of the board) and a configurable universal differential output
termination network.
To improve signal integrity the configurable universal differential termination network is designed to
have minimum stubs and trace impedance mismatches. Since it contains a large variety of termination
configurations, some resistor placeholders are dual-purpose and can accommodate capacitors. For
example, R12 can be a 0-ohm resistor in one configuration and a 0.1-uF capacitor in another.
Section 3
describes configuration of the EVB at shipment.
The full detailed schematic is shown in
SiT6760EB UM Rev 1.0 | Preliminary
SiT6760EB Evaluation User Manual
(Figure
1). The only active device on the EVB is the SiTime
Appendix
Page 1 of 11
A.
Table
1, a power
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Summary of Contents for SiTime SiT6760EB

  • Page 1: Table Of Contents

    Appendix C – Board View ..........................10 Introduction The SiT6760EB evaluation board (EVB) is a simple and easy to use tool that enables component-level performance evaluation of SiTime SiT9501 and SiT937x differential oscillators. The EVB is shipped to customers with the differential oscillator in 3.2 mm x 2.5 mm 6-pin QFN package mounted on the board.
  • Page 2 SiT6760EB Evaluation User Manual Pin 2 Access Pin 1 Access Connector Connector Power Supply Connector Differential Clock Outputs Configurable Termination Bias Voltage Network Connector SiTime Differential Oscillator Figure 1: SiT6760EB SiT6760EB UM Rev 1.0 | Preliminary Page 2 of 11 www.sitime.com...
  • Page 3 OUT+ and J1, J2 Differential outputs of the device OUT- Note: Pin 1 location of the oscillator is indicated on the silkscreen with a dot. SiT6760EB UM Rev 1.0 | Preliminary Page 3 of 11 www.sitime.com...
  • Page 4: Standard Shipping Configurations

    SiT6760EB Evaluation User Manual Standard Shipping Configurations To simplify the evaluation of SiTime differential oscillators the SiT6760EB is shipped with the assembly option that enables direct connection of the EVB to measurement equipment with 50-ohm inputs, such as a high-speed oscilloscope. SMA cables of the same length must be used to connect both true and complimentary outputs of the EVB, otherwise undesired signal skew between the differential outputs will be introduced due to unequal signal delays in the cables.
  • Page 5: Hcsl Shipping Configuration

    In contrast to the standard HCSL driver, the low power HCSL driver should not be directly connected to 50-ohm instrument inputs as it will experience signal attenuation and will not meet the datasheet specs. SiT6760EB UM Rev 1.0 | Preliminary Page 5 of 11...
  • Page 6 Figure 4: HCSL DC-coupled termination for direct connection to the instrument with 50-ohm inputs Figure 5: Schematic of HCSL standard shipping configuration. NL designates components that should not be loaded SiT6760EB UM Rev 1.0 | Preliminary Page 6 of 11 www.sitime.com...
  • Page 7: Phase Noise And Phase Jitter Measurement

    OUTP and OUTN. The common-mode noise present on individual conductors of a differential-pair are attenuated inside the balun. The SiTime SiT6801EB balun board can be used together with the SiT6760EB as shown in Figure 6. For more information regarding measuring phase noise, refer to application note AN10067.
  • Page 8: Appendix A - Generic Evb Schematic

    SiT6760EB Evaluation User Manual Appendix A – Generic EVB Schematic* Figure 7: SiT6760EB rev 1.0 schematic *Refer to Section 3 for the exact termination circuit assembly option for your shipping configuration. SiT6760EB UM Rev 1.0 | Preliminary Page 8 of 11...
  • Page 9: Appendix B - Connector Ordering Codes

    Digi-Key p/n for Connectors Digi-Key p/n mating connector associated products POWER WM4302-ND WM2002-ND WM1114-ND VBIAS WM4302-ND WM2002-ND WM1114-ND PIN 1 732-5335-ND 609-2341-ND 609-3614-1-ND PIN 2 732-5335-ND 609-2341-ND 609-3614-1-ND OUTPUT 343-CONSMA020.062-G-ND SiT6760EB UM Rev 1.0 | Preliminary Page 9 of 11 www.sitime.com...
  • Page 10: Appendix C - Board View

    SiT6760EB Evaluation User Manual Appendix C – Board View Figure 8: SiT6760EB rev 1.0 – Top view Figure 9: SiT6760EB rev 1.0 – Bottom view SiT6760EB UM Rev 1.0 | Preliminary Page 10 of 11 www.sitime.com...
  • Page 11 © SiTime Corporation, December 2020. The information contained herein is subject to change at any time without notice. SiTime assumes no responsibility or liability for any loss, damage or defect of a Product which is caused in whole or in part by (i) use of any circuitry other than circuitry embodied in a SiTime product, (ii) misuse or abuse...

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