Sit6502Eb Support Collateral; Connectors Descriptions - SiTime SiT6502EB User Manual

SiT6502EB Evaluation Board (EVB) HW User Manual
3

SiT6502EB Support Collateral

The SiT6502EB Evaluation Board is provided with the following collateral:
- SiT6502EB EVB HW User Manual
- Time Master for Clocks SW
- Time Master for Clocks SW User Manual
4

Connectors Descriptions

Table 1 lists the SiT6502EB EVB connectors.
Table 1. SiT6502EB connectors
Connector Designators
Power + Control
Power
Inputs
Outputs
External FTDI supply
External +3.3V (VDD Left)
Input receiver supply
External +3.3V (VDD PLL)
supply
External Output VDD Supply
Common Mode to GND
Headers in output
terminations
Output LDO Regulators
Enable Inputs to GND Headers
Left Supply LDO Regulators
Enable Inputs to GND Headers
Header for internal use only
2
Headers for I C bus Pull-up
Header
Header for PLL supply LDO
regulator output Shut Down
SiT6502EB HW UM Preliminary Rev 1.0
Description
USB Type B connectors (J3) for Device programming and
+5V supply
USB Type B connectors (J4) for +5V supply, 2-pin connectors
(J80, J7) for external +5V power supply
SMA connectors (J35 through J42) for receiving external
clock signals
SMA connectors (J43 through J62) for synthesized clock
outputs
2-pin connector (H13)
2-pin connector (H1)
2-pin connector (H12)
2-pin connectors (H2 through H11)
2-pin Headers (JSCL13 through JSCL22)
2-pin Headers (J2, JSCL3 through JSCL11), shorted by default
for LDO outputs enabling
2-pin Headers (J1), shorted by default for LDO outputs
enabling
2-pin Header (JSCL 1), shorted by default
2-pin Headers (JSCL 2, JSCL 12), shorted by default
1-pin Header (J5)
2-pin Header (J12)
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