Table of Contents
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Contents
1 Introduction ............................................................................................................................................. 1
2 I/O Descriptions ....................................................................................................................................... 2
3 EVB Usage Descriptions ........................................................................................................................... 2
3.1 EVB Configurations .......................................................................................................................... 2
2
C Support ............................................................................................................................. 3
3.2 Waveform Capturing Using Active Probe ........................................................................................ 3
3.3 Measuring Jitter and Phase Noise ................................................................................................... 5
3.4 Current Measurement ..................................................................................................................... 5
Appendix A .................................................................................................................................................... 6
1
Introduction
The SiT6722EB evaluation board (EVB) is designed for use with SiTime's Elite Super-TCXOs in the 10-pin,
5.0 x 3.2 mm ceramic packages. It enables the evaluation of key functionalities of these precision Super-
TCXOs in all three configuration modes including TCXO, VCTCXO and DCTCXO with I
EVB Features
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Support for all three Super-TCXO configuration modes: TCXO, VCTCXO, DCTCXO
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Probing points for frequency measurements
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Connector access for controlling the output frequency via I
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Connector for current measurement
SiTime typically ships the EVB with the Super-TCXO mounted using SiTime recommended reflow profile.
The Super-TCXO device should only be evaluated in its original soldered down state for best signal
integrity and frequency stability. The device performance is not guaranteed if it is de-soldered and then
re-soldered either manually or via reflow process.
SiT-AN6722EB Manual Rev. 2.0
SiT6722EB Evaluation Board
User Manual
Page 1 of 8
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Summary of Contents for SiTime SiT6722EB
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Page 1: Table Of Contents
Appendix A ..............................6 Introduction The SiT6722EB evaluation board (EVB) is designed for use with SiTime’s Elite Super-TCXOs in the 10-pin, 5.0 x 3.2 mm ceramic packages. It enables the evaluation of key functionalities of these precision Super- TCXOs in all three configuration modes including TCXO, VCTCXO and DCTCXO with I... -
Page 2: O Descriptions
P1, P2, P3, P4 are reserved for SiTime internal use only. EVB Usage Descriptions EVB Configurations SiT6722EB can be configured to support all three Super-TCXO configuration modes including TCXO with output enable (OE), VCTCXO with analog voltage control and DCTCXO with I Figure A1 Appendix A shows the complete electrical schematic of SiT6722EB. -
Page 3: I 2 C Support
Waveform Capturing Using Active Probe SiTime Elite Super-TCXO is a high speed logic output device. It is critical that the proper logic and high frequency measurement techniques are used along with the high quality active probe in order to ensure best measurement results. - Page 4 SiT6722EB Evaluation Board User Manual Figure 1. Proper Waveform capturing on SiT6722EB SiT-AN6722EB Manual Rev. 2.0 Page 4 of 8 www.sitime.com...
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Page 5: Measuring Jitter And Phase Noise
Measuring Jitter and Phase Noise For jitter measurements, make sure that SMA connector and source termination resistor R9 are properly soldered on the EVB. R9 value should be 25Ω for best source matching (refer to SiTime AN10002 more information). The R9 can be populated using one of the following options: 0Ω... - Page 6 SiT6722EB Evaluation Board User Manual Appendix A Figure A1. SiT6722EB EVB Electrical schematics SiT-AN6722EB Manual Rev. 2.0 Page 6 of 8 www.sitime.com...
- Page 7 SiT6722EB Evaluation Board User Manual Table A1. Bill of Materials (BOM) Reference Designators Description SMD component size Value C1, C2 Capacitors Case A 10 uF Capacitor 0603 0.1 uF Capacitor 0603 0.01 uF Capacitor 0603 15 pF Resistors 0603 10 Ω...
- Page 8 © SiTime Corporation, June 2019. The information contained herein is subject to change at any time without notice. SiTime assumes no responsibility or liability for any loss, damage or defect of a Product which is caused in whole or in part by (i) use of any circuitry other than circuitry embodied in a SiTime product, (ii) misuse or abuse...
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